SLVSAM9D April   2011  – December 2015 DRV8802

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Protection Circuits
        1. 7.3.2.1 Overcurrent Protection (OCP)
        2. 7.3.2.2 Thermal Shutdown (TSD)
        3. 7.3.2.3 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Bridge Control
      2. 7.4.2 Current Regulation
      3. 7.4.3 Decay Mode and Braking
      4. 7.4.4 Blanking Time
      5. 7.4.5 nRESET and nSLEEP Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
        2. 8.2.2.2 Decay Modes
        3. 8.2.2.3 Sense Resistor
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Bulk Capacitance
    2. 9.2 Power Supply and Logic Sequencing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Power Dissipation
      2. 10.3.2 Heatsinking
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

PWP Package
28-Pin Package
Top View
DRV8802 po_pwp_lvsab9.gif

Pin Functions

PIN I/O(1) DESCRIPTION EXTERNAL COMPONENTS
OR CONNECTIONS
NAME PIN
POWER AND GROUND
CP1 1 IO Charge pump flying capacitor Connect a 0.01-μF 50-V capacitor between CP1 and CP2.
CP2 2 IO Charge pump flying capacitor
GND 14, 28 Device ground
VCP 3 IO High-side gate drive voltage Connect a 0.1-μF 16-V ceramic capacitor and a 1-MΩ resistor to VM.
VMA 4 Bridge A power supply Connect to motor supply (8.2 V to 45 V). Both pins must be connected to the same supply, bypassed with a 0.1-µF capacitor to GND, and connected to appropriate bulk capacitance.
VMB 11 Bridge B power supply
V3P3OUT 15 O 3.3-V regulator output Bypass to GND with a 0.47-μF, 6.3-V ceramic capacitor. Can be used to supply VREF.
CONTROL
AENBL 21 I Bridge A enable Logic high to enable bridge A
AI0 24 I Bridge A current set Sets bridge A current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
AI1 25 I
APHASE 20 I Bridge A phase (direction) Logic high sets AOUT1 high, AOUT2 low
AVREF 12 I Bridge A current set reference input Reference voltage for winding current set. Can be driven individually with an external DAC for microstepping, or tied to a reference (for example, V3P3OUT).
BENBL 22 I Bridge B enable Logic high to enable bridge B
BI0 26 I Bridge B current set Sets bridge B current: 00 = 100%,
01 = 71%, 10 = 38%, 11 = 0
BI1 27 I
BPHASE 23 I Bridge B phase (direction) Logic high sets BOUT1 high, BOUT2 low
BVREF 13 I Bridge B current set reference input Reference voltage for winding current set. Can be driven individually with an external DAC for microstepping, or tied to a reference (for example, V3P3OUT).
DECAY 19 I Decay (brake) mode Low = brake (slow decay),
high = coast (fast decay)
nRESET 16 I Reset input Active-low reset input initializes internal logic and disables the H-bridge outputs
nSLEEP 17 I Sleep mode input Logic high to enable device, logic low to enter low-power sleep mode
STATUS
nFAULT 18 OD Fault Logic low when in fault condition (overtemp, overcurrent)
OUTPUT
AOUT1 5 O Bridge A output 1 Connect to motor winding A
AOUT2 7 O Bridge A output 2
BOUT1 10 O Bridge B output 1 Connect to motor winding B
BOUT2 8 O Bridge B output 2
ISENA 6 IO Bridge A ground / Isense Connect to current sense resistor for bridge A
ISENB 9 IO Bridge B ground / Isense Connect to current sense resistor for bridge B
(1) Directions: I = input, O = output, OZ = tri-state output, OD = open-drain output, IO = input/output