SLVSA72E April   2010  – October 2015 DRV8813

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Motor Drivers
      2. 7.3.2 Protection Circuits
        1. 7.3.2.1 Overcurrent Protection (OCP)
        2. 7.3.2.2 Thermal Shutdown (TSD)
        3. 7.3.2.3 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Bridge Control
      2. 7.4.2 Current Regulation
      3. 7.4.3 Decay Mode
      4. 7.4.4 Blanking Time
      5. 7.4.5 nRESET and nSLEEP Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Current Regulation
        2. 8.2.2.2 Decay Modes
        3. 8.2.2.3 Sense Resistor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Bulk Capacitance
    2. 9.2 Power Supply and Logic Sequencing
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Thermal Protection
      2. 10.3.2 Heatsinking
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

  • The VMA and VMB pins should be bypassed to GND using low-ESR ceramic bypass capacitors with a recommended value of 0.1-μF rated for VMx. This capacitor should be placed as close to the VMA and VMB pins as possible with a thick trace or ground plane connection to the device GND pin.
  • The VMA and VMB pins must be bypassed to ground using an appropriate bulk capacitor. This component may be an electrolytic and should be located close to the DRV8813.
  • A low-ESR ceramic capacitor must be placed in between the CPL and CPH pins. TI recommends a value of 0.01-μF rated for VMx. Place this component as close to the pins as possible.
  • A low-ESR ceramic capacitor must be placed in between the VMA and VCP pins. TI recommends a value of 0.1-μF rated for 16 V. Place this component as close to the pins as possible. Also, place a 1-MΩ resistor between VCP and VMA.
  • Bypass V3P3 to ground with a ceramic capacitor rated 6.3 V. Place this bypass capacitor as close to the pin as possible.

10.2 Layout Example

DRV8813 layout_ex_slvsa72.gif Figure 11. DRV8813 Layout Example

10.3 Thermal Considerations

10.3.1 Thermal Protection

The DRV8813 has thermal shutdown (TSD) as described in Thermal Shutdown (TSD). If the die temperature exceeds approximately 150°C, the device is disabled until the temperature drops to a safe level.

Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient heatsinking, or too high an ambient temperature.

10.3.2 Heatsinking

The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad must be thermally connected to copper on the PCB to dissipate heat. On a multilayer PCB with a ground plane, this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom layers.

For details about how to design the PCB, see TI application reportPowerPAD™ Thermally Enhanced Package SLMA002, and TI application brief SLMA004, PowerPAD™ Made Easy, available at www.ti.com.

In general, the more copper area that can be provided, the more power can be dissipated.

10.4 Power Dissipation

Power dissipation in the DRV8813 is dominated by the power dissipated in the output FET resistance, or RDS(ON). Average power dissipation when running a stepper motor can be roughly estimated by Equation 3.

Equation 3. DRV8813 eq2_lvs997.gif

where

  • PTOT is the total power dissipation
  • RDS(ON) is the resistance of each FET
  • IOUT(RMS) is the RMS output current being applied to each winding.
  • IOUT(RMS) is equal to the approximately 0.7× the full-scale output current setting.

The factor of 4 comes from the fact that there are two motor windings, and at any instant two FETs are conducting winding current for each winding (one high-side and one low-side).

The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and heatsinking.

RDS(ON) increases with temperature, so as the device heats, the power dissipation increases. This must be taken into consideration when sizing the heatsink.