JAJSSZ2 February   2024 ESD562

PRODUCTION DATA  

  1.   1
  2. 1特長
  3. 2アプリケーション
  4. 3概要
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings - JEDEC Specifications
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
  8. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 ドキュメントの更新通知を受け取る方法
    3. 7.3 サポート・リソース
    4. 7.4 Trademarks
    5. 7.5 静電気放電に関する注意事項
    6. 7.6 用語集
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
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サーマルパッド・メカニカル・データ
発注情報

5.6 Electrical Characteristics

At TA = 25°C unless otherwise noted
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VRWMReverse stand-off voltageIIO < 50nA-1212V
ILEAKAGELeakage current at VRWMVIO = ±12V, I/O to GND1050nA
VBR

Breakdown Voltage, IO to GND and GND to IO(1)

IIO = ±1mA13.218V
VCLAMPSurge clamping voltage, tp = 8/20µs(2)IPP = ±3A, I/O to GND21V

TLP clamping voltage, tp = 100ns(3)

IPP = 16A (100ns TLP), I/O to GND

22V
TLP clamping voltage, tp = 100ns(3)IPP = 16A (100ns TLP), GND to

I/O

22V

VHOLD

Holding Voltage, I/O to GND(4)

TLP, IO to GND or GND to IO

16.5V

CLine

Line capacitance, IO to GND

VIO = 0V, f = 1MHz

1.5pF
(1) VBR is defined as the voltage obtained at 1mA when sweeping the voltage up, before the devices latches into the snapback state