JAJSFJ7A May   2018  – September 2018 HD3SS3202

PRODUCTION DATA.  

  1. 1     特長
  2. 2     アプリケーション
  3. 3     概要
  4. DeviceImages
    1. 概略回路図 5
  5. 4     改訂履歴
  6. 5     Pin Configuration and Functions
    1. Pin Functions
  7. 6     Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 High-Speed Performance Parameters
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7     Parameter Measurement Information
  9. 8     Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Enable and Power Savings
    4. 8.4 Device Functional Modes
  10. 9     Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Down Facing Port for USB3.1 Type C
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
    3. 9.3 Systems Examples
      1. 9.3.1 Up Facing Port for USB3.1 Type C
      2. 9.3.2 PCIE/USB
      3. 9.3.3 PCIE/eSATA
      4. 9.3.4 USB/eSATA
      5. 9.3.5 MIPI Camera Serial Interface
  11. 10    Power Supply Recommendations
  12. 11    Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12    デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  14. 13    メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.1.2 Detailed Design Procedure

The HD3SS3202 is a high-speed passive switch device that can behave as a mux or demux. Because this is a passive switch, signal integrity is important because the device provides no signal conditioning capability. The device can support 1 to 2 inches of board trace and a connector on either end.

To design in the HD3SS3202, the designer needs to understand the following.

  • Determine the loss profile between circuits that are to be muxed or demuxed.
  • Provide clean impedance and electrical length matched board traces.
  • Depending upon the application, determine the best place to put the 100-nF coupling capacitor.
  • Provide a control signal for the SEL and OEn pins. It may be necessary to include a 0.01µF to GND on each of these pins to help with noise immunity.
  • See the application schematics on recommended decouple capacitors from VCC pins to ground