SLLSER6 December   2015 ISO7310-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics—5-V Supply
    6. 6.6  Supply Current Characteristics—5-V Supply
    7. 6.7  Electrical Characteristics—3.3-V Supply
    8. 6.8  Supply Current Characteristics—3.3-V Supply
    9. 6.9  Power Dissipation Characteristics
    10. 6.10 Switching Characteristics—5-V Supply
    11. 6.11 Switching Characteristics
    12. 6.12 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 High Voltage Feature Description
        1. 8.3.1.1 Insulation and Safety-Related Specifications for D-8 Package
        2. 8.3.1.2 Insulation Characteristics
        3. 8.3.1.3 Regulatory Information
        4. 8.3.1.4 Safety Limiting Values
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Typical Supply Current Equations
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Electromagnetic Compatibility (EMC) Considerations
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resource
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage(2) VCC1 , VCC2 –0.5 6 V
Voltage (2) IN, OUT –0.5 VCC+0.5(3) V
IO Output current ±15 mA
TJ Junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal and are peak voltage values.
(3) Maximum voltage must not exceed 6 V.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±4000 V
Charged-device model (CDM), per AEC Q100-011 ±1500
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VCC1, VCC2 Supply voltage 3 5.5 V
IOH High-level output current –4 mA
IOL Low-level output current 4 mA
VIH High-level input voltage 2 5.5 V
VIL Low-level input voltage 0 0.8 V
tui Input pulse duration 40 ns
1 / tui Signaling rate 0 25 Mbps
TJ Junction temperature(1) 136 °C
TA Ambient temperature –40 25 125 °C
(1) To maintain the recommended operating conditions for TJ, see the Thermal Information table.

6.4 Thermal Information

THERMAL METRIC(1) ISO7310-Q1 UNIT
D (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance 119.9 °C/W
RθJCtop Junction-to-case (top) thermal resistance 65.2 °C/W
RθJB Junction-to-board thermal resistance 61.3 °C/W
ψJT Junction-to-top characterization parameter 19.3 °C/W
ψJB Junction-to-board characterization parameter 60.7 °C/W
RθJCbot Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics—5-V Supply

VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –4 mA; see Figure 9 VCC2 – 0.5 4.7 V
IOH = –20 μA; see Figure 9 VCC2 – 0.1 5
VOL Low-level output voltage IOL = 4 mA; see Figure 9 0.2 0.4 V
IOL = 20 μA; see Figure 9 0 0.1
VI(HYS) Input threshold voltage hysteresis 480 mV
IIH High-level input current IN = VCC 10 μA
IIL Low-level input current IN = 0 V –10 μA
CMTI Common-mode transient immunity VI = VCC or 0 V; see Figure 11. 25 65 kV/μs

6.6 Supply Current Characteristics—5-V Supply

All inputs switching with square wave clock signal for dynamic ICC measurement. VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS SUPPLY CURRENT MIN TYP MAX UNIT
Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCC or 0 V,
AC Input: CL = 15 pF
ICC1 0.3 0.6 mA
ICC2 1.6 2.4
10 Mbps CL = 15 pF ICC1 0.5 1
ICC2 2.2 3.2
25 Mbps CL = 15 pF ICC1 0.8 1.3
ICC2 3 4.2

6.7 Electrical Characteristics—3.3-V Supply

VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High-level output voltage IOH = –4 mA; see Figure 9 VCC2 – 0.5 3 V
IOH = –20 μA; see Figure 9 VCC2 – 0.1 3.3
VOL Low-level output voltage IOL = 4 mA; see Figure 9 0.2 0.4 V
IOL = 20 μA; see Figure 9 0 0.1
VI(HYS) Input threshold voltage hysteresis 450 mV
IIH High-level input current IN = VCC 10 μA
IIL Low-level input curre IN = 0 V –10 μA
CMTI Common-mode transient immunity VI = VCC or 0 V; see Figure 11 25 50 kV/μs

6.8 Supply Current Characteristics—3.3-V Supply

All inputs switching with square wave clock signal for dynamic ICC measurement. VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS SUPPLY CURRENT MIN TYP MAX UNIT
Supply current for VCC1 and VCC2 DC to 1 Mbps DC Input: VI = VCC or 0 V,
AC Input: CL = 15 pF
ICC1 0.2 0.4 mA
ICC2 1.2 1.8
10 Mbps CL = 15 pF ICC1 0.3 0.5
ICC2 1.6 2.2
25 Mbps CL = 15 pF ICC1 0.5 0.8
ICC2 2.1 3

6.9 Power Dissipation Characteristics

VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, Input a 12.5 MHz 50% duty-cycle square wave (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PD Maximum power dissipation 34 mW
PD1 Power dissipation by Side-1 7.9 mW
PD2 Power dissipation by Side-2 26.1 mW

6.10 Switching Characteristics—5-V Supply

VCC1 and VCC2 at 5 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 9 20 32 58 ns
PWD(1) Pulse width distortion |tPHL – tPLH| See Figure 9 4 ns
tsk(pp) (2) Part-to-part skew time 24 ns
tr Output signal rise time See Figure 9 2.5 ns
tf Output signal fall time See Figure 9 2 ns
tfs Fail-safe output delay time from input power loss See Figure 10 7.5 μs
(1) Also known as pulse skew.
(2) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

6.11 Switching Characteristics

VCC1 and VCC2 at 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay time See Figure 9 22 36 67 ns
PWD(1) Pulse width distortion |tPHL – tPLH| See Figure 9 3.5 ns
tsk(pp) (2) Part-to-part skew time 28 ns
tr Output signal rise time See Figure 9 3.2 ns
tf Output signal fall time See Figure 9 2.7 ns
tfs Fail-safe output delay time from input power loss See Figure 10 7.4 μs
(1) Also known as pulse skew.
(2) tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same direction while operating at identical supply voltages, temperature, input signals and loads.

6.12 Typical Characteristics

ISO7310-Q1 C002_SLLSEI8.png
TA = 25°C CL = 15 pF
Figure 1. Supply Current vs Data Rate (With 15-pF Load)
ISO7310-Q1 C004_SLLSEI8.png
TA = 25°C
Figure 3. High-Level Output Voltage vs High-level Output Current
ISO7310-Q1 C006_SLLEI8.png
Figure 5. Power Supply Undervoltage Threshold vs Free-Air Temperature
ISO7310-Q1 C008_SLLEI8.gif
Figure 7. Input Glitch Suppression Time vs Free-Air Temperature
ISO7310-Q1 C003_SLLSEI8.png
TA = 25°C CL = No Load
Figure 2. Supply Current vs Data Rate (With No Load)
ISO7310-Q1 C005_SLLSEI8.png
TA = 25°C
Figure 4. Low-Level Output Voltage vs Low-Level Output Current
ISO7310-Q1 C007_SLLSEI8.gif
Figure 6. Propagation Delay Time vs Free-Air Temperature
ISO7310-Q1 C009_SLLEI8.gif
TA = 25°C
Figure 8. Output Jitter vs Data Rate