JAJS772E June   1999  – July 2018 LM2574 , LM2574HV

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーション(固定出力電圧版)
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics for All Output Voltage Versions
    6. 6.6  Electrical Characteristics – 3.3-V Version
    7. 6.7  Electrical Characteristics – 5-V Version
    8. 6.8  Electrical Characteristics – 12-V Version
    9. 6.9  Electrical Characteristics – 15-V Version
    10. 6.10 Electrical Characteristics – Adjustable Version
    11. 6.11 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit
      2. 7.3.2 Undervoltage Lockout
      3. 7.3.3 Delayed Start-Up
      4. 7.3.4 Adjustable Output, Low-Ripple Power Supply
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input Capacitor (CIN)
      2. 8.1.2 Inductor Selection
      3. 8.1.3 Inductor Ripple Current
      4. 8.1.4 Output Capacitor
      5. 8.1.5 Catch Diode
      6. 8.1.6 Output Voltage Ripple and Transients
      7. 8.1.7 Feedback Connection
      8. 8.1.8 ON/OFF Input
      9. 8.1.9 Additional Applications
        1. 8.1.9.1 Inverting Regulator
        2. 8.1.9.2 Negative Boost Regulator
    2. 8.2 Typical Applications
      1. 8.2.1 Fixed Output Voltage Applications
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Inductor Selection (L1)
          3. 8.2.1.2.3 Output Capacitor Selection (COUT)
          4. 8.2.1.2.4 Catch Diode Selection (D1)
          5. 8.2.1.2.5 Input Capacitor (CIN)
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Adjustable Output Voltage Applications
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Programming Output Voltage
          2. 8.2.2.2.2 Inductor Selection (L1)
          3. 8.2.2.2.3 Output Capacitor Selection (COUT)
          4. 8.2.2.2.4 Catch Diode Selection (D1)
          5. 8.2.2.2.5 Input Capacitor (CIN)
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Grounding
    4. 10.4 Thermal Considerations
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
      3. 11.1.3 デバイスの項目表記
        1. 11.1.3.1  降圧レギュレータ
        2. 11.1.3.2  昇降圧レギュレータ
        3. 11.1.3.3  デューティ・サイクル(D)
        4. 11.1.3.4  キャッチ・ダイオードまたは電流ステアリング・ダイオード
        5. 11.1.3.5  コンデンサの等価直列抵抗(ESR)
        6. 11.1.3.6  等価直列インダクタンス(ESL)
        7. 11.1.3.7  出力リップル電圧
        8. 11.1.3.8  コンデンサのリップル電流
        9. 11.1.3.9  スタンバイ時静止電流(ISTBY)
        10. 11.1.3.10 インダクタのリップル電流(ΔIIND)
        11. 11.1.3.11 連続/不連続モードの動作
        12. 11.1.3.12 インダクタの飽和
        13. 11.1.3.13 動作電圧のマイクロ秒定数(E・Top)
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

The layout is critical for the proper operation of switching power supplies. First, the ground plane area must be sufficient for thermal dissipation purposes. Second, appropriate guidelines must be followed to reduce the effects of switching noise. Switch mode converters are very fast switching devices. In such cases, the rapid increase of input current combined with the parasitic trace inductance generates unwanted L di/dt noise spikes. The magnitude of this noise tends to increase as the output current increases. This noise may turn into electromagnetic interference (EMI) and can also cause problems in device performance. Therefore, take care in the layout to minimize the effect of this switching noise.

The most important layout rule is to keep the AC current loops as small as possible. Figure 33 shows the current flow in a buck converter. The top schematic shows a dotted line which represents the current flow during the top switch ON-state. The middle schematic shows the current flow during the top switch OFF-state. The bottom schematic shows the currents referred to as AC currents. These AC currents are the most critical because they are changing in a very short time period. The dotted lines of the bottom schematic are the traces to keep as short and wide as possible. This also yields a small loop area reducing the loop inductance. To avoid functional problems due to layout, review the PCB layout example. Best results are achieved if the placement of the LM2574 device, the bypass capacitor, the Schottky diode, RFBB, RFBT, and the inductor are placed as shown in the example. In the layout shown, R1 = RFBB and R2 = RFBT. TI also recommends using 2-oz. copper boards or heavier to help thermal dissipation and to reduce the parasitic inductances of board traces. See the application note AN-1229 SIMPLE SWITCHER® PCB Layout Guidelines (SNVA054) for more information.

LM2574 LM2574HV figurexx.pngFigure 33. Buck Converter Current Flow