JAJSB09K January 2010 – February 2018 LM27402
PRODUCTION DATA.
The LM27402 operating input voltage range is from 3 V to 20 V. The device is intended for POL conversions from 3.3-V, 5-V, and 12-V unregulated, semiregulated and fully regulated supply rails. It is also suitable for connection to intermediate bus converters with output rails centered at 12 V and 9.6 V (derived from 4:1 and 5:1 primary-secondary transformer step-downs in nonregulated full-bridge converter topologies) and voltage levels intrinsic to a wide variety of battery chemistries.
The LM27402 uses an internal LDO subregulator to provide a 4.5-V bias rail for the gate drive and control circuits (assuming the input voltage is higher than 4.5 V plus the necessary subregulator dropout specification). Naturally, it can be more favorable to connect VDD directly to the input during low input voltage operation
(VVIN < 5.5 V). In summary, connecting VDD to VIN during low input voltage operation provides a greater gate drive voltage level and thus an inherent efficiency benefit. However, by virtue of the low subregulator dropout voltage, this VDD to VIN connection is not mandatory, thus enabling input ranges from 3 V up to 20 V.
In general, the subregulator is rated to drive the two internal gate driver stages in addition to the quiescent current associated with the operation of the LM27402. VDD and VIN pins of the LM27402 can be tied together if the input voltage is ensured not to exceed 5.5 V (absolute maximum 6 V). This connection bypasses the internal LDO bias regulator and eliminates the LDO dropout voltage and power dissipation. An RC filter from the input rail to the VIN pin, for example 2.2 Ω and 1 µF, presents supplementary filtering at the VIN pin. Low gate threshold voltage MOSFETs are recommended for this configuration.