JAJS771H October   1999  – October 2018 LM4041-N , LM4041-N-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ブロック図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions: ADJ Pinouts
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  LM4041-N-xx 1.2 Electrical Characteristics (Industrial Temperature Range)
    6. 6.6  LM4041-N-xx 1.2 Electrical Characteristics (Industrial Temperature Range)
    7. 6.7  LM4041-N-xx 1.2 Electrical Characteristics (Extended Temperature Range)
    8. 6.8  LM4041-N-xx ADJ (Adjustable) Electrical Characteristics (Industrial Temperature Range)
    9. 6.9  LM4041-N-xx ADJ (Adjustable) Electrical Characteristics (Extended Temperature Range)
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Shunt Regulator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Adjustable Shunt Regulator
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detail Design Procedure
      3. 9.2.3 Bounded Amplifier
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detail Design Procedure
        3. 9.2.3.3 Application Curve
      4. 9.2.4 Voltage Level Detector
        1. 9.2.4.1 Design Procedure
        2. 9.2.4.2 Detail Design Procedure
      5. 9.2.5 Precision Current Sink and Source
        1. 9.2.5.1 Design Requirements
        2. 9.2.5.2 Detailed Design Procedure
      6. 9.2.6 100-mA Current Source
        1. 9.2.6.1 Design Requirements
        2. 9.2.6.2 Detailed Design Procedure
      7. 9.2.7 LM4041 in Clamp Circuits
        1. 9.2.7.1 Design Requirements
        2. 9.2.7.2 Detailed Design Procedure
      8. 9.2.8 Floating Current Detector
        1. 9.2.8.1 Design Requirement
        2. 9.2.8.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連リンク
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.9 LM4041-N-xx ADJ (Adjustable) Electrical Characteristics (Extended Temperature Range)

All limits TJ = 25°C, unless otherwise specified (SOT-23, see(1)), IRMIN ≤ IR ≤ 12 mA, VREF ≤ VOUT ≤ 10 V. The grades C and D designate initial Reference Voltage Tolerances of ±0.5% and ±1%, respectively for VOUT = 5 V.
PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT
VREF Reference voltage IR = 100 μA, VOUT = 5 V 1.233 V
Reference voltage tolerance(4) IR = 100 μA, VOUT = 5 V TJ = 25°C LM4041CEM3, LM4041QCEM3 ±6.2 mV
LM4041DEM3, LM4041QDEM3 ±12
TA = TJ = TMIN to TMAX LM4041CEM3, LM4041QCEM3 ±18
LM4041DEM3, LM4041QDEM3 ±30
IRMIN Minimum operating current TJ = 25°C LM4041CEM3, LM4041QCEM3 45 60 μA
LM4041DEM3, LM4041QDEM3 65
TA = TJ = TMIN to TMAX LM4041CEM3, LM4041QCEM3 68
LM4041DEM3, LM4041QDEM3 73
ΔVREF/ΔIR Reference voltage
change with operating
current change(5) 		IRMIN ≤ IR ≤ 1 mA
SOT-23: VOUT ≥ 1.6 V(1) 		TJ = 25°C LM4041CEM3, LM4041QCEM3 0.7 1.5 mV
LM4041DEM3, LM4041QDEM3 2
TA = TJ = TMIN to TMAX LM4041CEM3, LM4041QCEM3 2
LM4041DEM3, LM4041QDEM3 2.5
1 mA ≤ IR ≤ 12 mA
SOT-23: VOUT ≥ 1.6 V(1) 		TJ = 25°C LM4041CEM3, LM4041QCEM3 2 8 mV
LM4041DEM3, LM4041QDEM3 10
TA = TJ = TMIN to TMAX LM4041CEM3, LM4041QCEM3 6
LM4041DEM3, LM4041QDEM3 8
ΔVREF/ΔVO Reference voltage change with output voltage change IR = 1 mA TJ = 25°C LM4041CEM3, LM4041QCEM3 –1.55 –2 mV/V
LM4041DEM3, LM4041QDEM3 –2.5
TA = TJ = TMIN to TMAX LM4041CEM3, LM4041QCEM3 –3
LM4041DEM3, LM4041QDEM3 –4
IFB Feedback current TJ = 25°C LM4041CEM3, LM4041QCEM3 60 100 nA
LM4041DEM3, LM4041QDEM3 150
TA = TJ = TMIN to TMAX LM4041CEM3, LM4041QCEM3 120
LM4041DEM3, LM4041QDEM3 200
ΔVREF/ΔT Average reference
voltage temperature
coefficient(4) 		VOUT = 5 V, IR =  10 mA 20 ppm/°C
IR =   1 mA TJ = 25°C 15
TA = TJ = TMIN to TMAX LM4041CEM3,
LM4041QCEM3		 ±100
LM4041DEM3,
LM4041QDEM3		 ±150
IR = 100 μA 15
ZOUT Dynamic output impedance IR = 1 mA, f = 120 Hz, 0.3 Ω
IAC = 0.1 IR
VOUT = VREF
VOUT =  10 V 2
eN Wideband noise IR = 100 μA, VOUT = VREF 20 μVrms
10 Hz ≤ f ≤ 10 kHz
ΔVREF Reference voltage long-term stability t = 1000 hrs, IR = 100 μA,
T = 25°C ±0.1°C		 120 ppm
VHYST Thermal hysteresis(6) ΔT = −40°C to +125°C 0.08%
(1) When VOUT ≤ 1.6 V, the LM4041-N ADJ in the SOT-23 package must operate at reduced IR. This is caused by the series resistance of the die attach between the die (–) output and the package (–) output pin. See the Output Saturation (SOT-23 only) curve in the Typical Characteristics section.
(2) Limits are 100% production tested at 25°C. Limits over temperature are ensured through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate AOQL.
(3) Typicals are at TJ = 25°C and represent most likely parametric norm.
(4) Reference voltage and temperature coefficient will change with output voltage. See Typical Characteristics curves.
(5) Load regulation is measured on pulse basis from no load to the specified load current. Ouput changes due to die temperature change must be taken into account separately.
(6) Thermal hysteresis is defined as the difference in voltage measured at +25°C after cycling to temperature –40°C and the +25°C measurement after cycling to temperature +125°C.