The recommended bias supply voltage range for LM5109B is from 8 V to 14 V. The lower end of this range is governed by the internal undervoltage lockout (UVLO) protection feature of the V_DD supply circuit blocks. The upper end of this range is driven by the 18-V absolute maximum voltage rating of the V_DD. TI recommends keeping a 4-V margin to allow for transient voltage spikes.

The UVLO protection feature also involves a hysteresis function. This means that once the device is operating in normal mode, if the V_DD voltage drops, the device continues to operate in normal mode as long as the voltage drop does not exceed the hysteresis specification, V_DDH. If the voltage drop is more than hysteresis specification, the device shuts down. Therefore, while operating at or near the 8-V range, the voltage ripple on the auxiliary power supply output must be smaller than the hysteresis specification of LM5109B to avoid triggering device-shutdown.

A local bypass capacitor must be placed between the VDD and GND pins. And this capacitor must be located as close to the device as possible. A low-ESR, ceramic surface mount capacitor is recommended. TI recommends using 2 capacitors across VDD and GND: a 100-nF, ceramic surface-mount capacitor for high-frequency filtering placed very close to VDD and GND pin, and another surface-mount capacitor, 220-nF to 10-µF, for IC bias requirements. In a similar manner, the current pulses delivered by the HO pin are sourced from the HB pin. Therefore a 22-nF to 220-nF local decoupling capacitor is recommended between the HB and HS pins.