JAJSFL4B April   2016  – June 2018 LMH0324

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ブロック概略図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Recommended SMBus Interface AC Timing Specifications
    7. 6.7 Serial Parallel Interface (SPI) AC Timing Specifications
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Input Configuration Pins
      2. 7.3.2 Carrier Detect
      3. 7.3.3 Adaptive Cable Equalizer
      4. 7.3.4 Launch Amplitude
      5. 7.3.5 Input-Output Mux Selection
      6. 7.3.6 Output Function Control
      7. 7.3.7 Output Driver Amplitude and De-Emphasis Control
      8. 7.3.8 Additional Programmability
        1. 7.3.8.1 Cable Length Indicator (CLI)
        2. 7.3.8.2 Digital MUTEREF
    4. 7.4 Device Functional Modes
      1. 7.4.1 System Management Bus (SMBus) Mode
        1. 7.4.1.1 SMBus Read and Write Transactions
          1. 7.4.1.1.1 SMBus Write Operation Format
          2. 7.4.1.1.2 SMBus Read Operation Format
      2. 7.4.2 Serial Peripheral Interface (SPI) Mode
        1. 7.4.2.1 SPI Read and Write Transactions
          1. 7.4.2.1.1 SPI Write Transaction Format
          2. 7.4.2.1.2 SPI Read Transaction Format
        2. 7.4.2.2 SPI Daisy Chain
    5. 7.5 LMH0324 Register Map
      1. 7.5.1 Share Register Page
      2. 7.5.2 CableEQ/Drivers Register Page
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Guidance for SMPTE Applications
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Recommended VOD and DE Register Settings
      4. 8.2.4 Application Performance Plots
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RTW|24
サーマルパッド・メカニカル・データ
発注情報

7.3.7 Output Driver Amplitude and De-Emphasis Control

The VOD_DE control pin selects the output amplitude and de-emphasis settings for both OUT0± and OUT1±. It offers users the capability to select higher output amplitude and de-emphasis level for longer board trace that connects the drivers to their downstream receivers. Driver de-emphasis provides transmitter equalization to reduce the ISI caused by the board trace.

By default, the output driver VOD and de-emphasis settings are configured by the VOD_DE pin logic settings shown in Table 4. These settings can be overridden via register control. Through register programming, the output amplitude and de-emphasis level can be individually set for OUT0± and OUT1±. SPI and SMBus register programming provide a wider range of output amplitude and de-emphasis levels.

Table 4. Recommended VOD_DE Pin and Register Settings for Different FR4 Trace Lengths(1)

VOD_DE
LEVEL		 VOD REG SETTING
OUT0±: 0x30[5]=1, 0x30[2:0]
OUT1±: 0x32[5]=1, 0x32[2:0] 		DEM REG SETTING
OUT0±: 0x31[6]=1, 0x31[2:0]
OUT1±: 0x33[6]=1, 0x33[2:0] 		VOD (mVpp)(2) VODDE (mVpp)(2) DEM (dB) FR4 TRACE LENGTH (inches)
H 0 0 410 410 0 0 – 1
F 2 2 560 500 -0.9 2 – 4
R 3 3 635 480 -2.4 5 – 6
L 5 5 810 480 -6.1 7 – 8
(1) The output drivers are capable of providing higher VOD and DEM levels (max settings are 7). For more VOD and de-emphasis levels, refer to Table 9.
(2) See Figure 8.
LMH0324 snls475_vod_de_level.gifFigure 8. VOD and VODDE Levels