JAJSHL5H October   2011  – June 2019 LMR24210

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーション
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Descriptions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Ratings
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  COT Control Circuit Overview
      2. 7.3.2  Start-up Regulator (VCC)
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Zero Coil Current Detect
      5. 7.3.5  Overvoltage Comparator
      6. 7.3.6  On-Time Timer, Shutdown
      7. 7.3.7  Current Limit
      8. 7.3.8  N-Channel Mosfet and Driver
      9. 7.3.9  Soft Start
      10. 7.3.10 Thermal Protection
      11. 7.3.11 Thermal Derating
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 External Components
      2. 8.2.2 Application Curve
  9. Layout
    1. 9.1 Layout Considerations
    2. 9.2 Layout Examples
    3. 9.3 Package Considerations
  10. 10デバイスおよびドキュメントのサポート
    1. 10.1 デバイス・サポート
      1. 10.1.1 開発サポート
        1. 10.1.1.1 WEBENCH®ツールによるカスタム設計
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 コミュニティ・リソース
    4. 10.4 商標
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 Glossary

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Overview

The LMR24210 step-down switching regulator features all required functions to implement a cost effective, efficient buck power converter capable of supplying 1 A to a load. It contains dual N-channel main and synchronous MOSFETs. The constant on-time (COT) regulation scheme requires no loop compensation, results in fast load transient response and simple circuit implementation. The regulator can function properly even with an all ceramic output capacitor network, and does not rely on the output capacitor’s ESR for stability. The operating frequency remains constant with line variations due to the inverse relationship between the input voltage and the on-time. The valley current limit detection circuit, with the limit set internally at 1.8 A, inhibits the main MOSFET until the inductor current level subsides.

The LMR24210 can be applied in numerous applications and can operate efficiently for inputs as high as 42 V. Protection features include output overvoltage protection, thermal shutdown, VCC undervoltage lockout and gate-drive undervoltage lockout. The LMR24210 is available in a small DSBGA chip-scale package.