SNOSAI7K September   2005  – May 2016 LMV651 , LMV652 , LMV654

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 3-V DC Electrical Characteristics
    6. 6.6 5-V DC Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low Voltage and Low Power Operation
      2. 7.3.2 Wide Bandwidth
      3. 7.3.3 Low Input Referred Noise
      4. 7.3.4 Ground Sensing and Rail-to-Rail Output
      5. 7.3.5 Small Size
    4. 7.4 Device Functional Modes
      1. 7.4.1 Stability and Capacitive Loading
      2. 7.4.2 In The Loop Compensation
      3. 7.4.3 Compensation By External Resistor
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High Gain, Low Power Inverting Amplifiers
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 High Gain, Low Power Noninverting Amplifiers
      3. 8.2.3 Active Filters
    3. 8.3 Dos and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings(1)(2)

MIN MAX UNIT
Differential input VID ±0.3
Supply voltage (VS = V+ - V−) 6
Input or output pin voltage V− − 0.3 V+ + 0.3 V
Soldering information Infrared or convection (20 sec) 235 °C
Wave soldering lead temperature (10 sec) 260
Junction temperature(3) 150 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.
(3) The maximum power dissipation is a function of TJ(MAX, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM)(1) ±2000 V
Machine model(2) ±100
(1) Human Body Model, applicable std. MIL-STD-883, Method 3015.7
(2) Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

6.3 Recommended Operating Conditions

MIN MAX UNIT
Temperature −40 125 °C
Supply voltage 2.7 5.5 V

6.4 Thermal Information

THERMAL METRIC(1) LMV651 LMV652 LMV653 UNIT
DCK
(SC70)		 DBV
(SOT-23)		 DGK
(VSSOP)		 PW
(TSSOP)
5 PINS 5 PINS 8 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 303.5 214.2 200.3 134.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 135.5 173.3 89.1 60.9 °C/W
RθJB Junction-to-board thermal resistance 81.1 72.5 120.9 77.3 °C/W
ψJT Junction-to-top characterization parameter 8.4 56.7 21.7 11.5 °C/W
ψJB Junction-to-board characterization parameter 80.4 71.9 119.4 76.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 3-V DC Electrical Characteristics

Unless otherwise specified, all limits are specified for TA = 25°C, V+ = 3 V, V− = 0 V, VO = VCM = V+/2, and RL > 1 MΩ.
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
VOS Input offset voltage 0.1 ±1.5 mV
Over specified temperature range 2.7
TC VOS Input offset average drift 6.6 μV/°C
IB Input bias current(3) 80 120 nA
IOS Input offset current 2.2 15 nA
CMRR Common-mode rejection ratio 0 ≤ VCM≤ 2 V 87 100 dB
Over specified temperature range 80
PSRR Power supply rejection ratio 3 ≤ V+ ≤ 5 V, VCM = 0.5 87 95 dB
Over specified temperature range 81
2.7 ≤ V+ ≤ 5.5 V,
VCM = 0.5		 87 95
Over specified temperature range 81
CMVR Input common-mode voltage range CMRR ≥ 75 dB 0 2.1 V
CMRR ≥ 60 dB, over specified temperature range 0 2.1
AVOL Large signal voltage gain 0.3 ≤ VO ≤ 2.7, RL = 2 kΩ to V+/2 80 85 dB
0.4 ≤ VO ≤ 2.6, RL = 2 kΩ to V+/2, over specified temperature range 76
0.3 ≤ VO ≤ 2.7, RL = 10 kΩ to V+/2 86 93
0.4 ≤ VO ≤ 2.6, RL = 10 kΩ to V+/2, over specified temperature range 83
VO Output swing high RL = 2 kΩ to V+/2 80 95 mV from rail
Over specified temperature range 120
RL = 10 kΩ to V+/2 45 50
Over specified temperature range 60
Output swing low RL = 2 kΩ to V+/2 95 110
Over specified temperature range 125
RL = 10 kΩ to V+/2 60 65
Over specified temperature range 75
ISC Maximum continuous output current Sourcing(4) 17 mA
Sinking(4) 25
IS Supply current per amplifier LMV651 115 140 μA
Over specified temperature range 175
LMV652 118 140
Over specified temperature range 175
LMV654 122 140
Over specified temperature range 175
SR Slew rate AV = +1, 10% to 90%(5) 3.0 V/μs
GBW Gain bandwidth product 12 MHz
en Input-referred voltage noise f = 100 kHz 17 nV/√Hz
f = 1 kHz 17
in Input-referred current noise f = 100 kHz 0.1 pA/√Hz
f = 1 kHz 0.15
THD Total harmonic distortion f = 1 kHz, AV = 2, RL = 2 kΩ 0.003%
(1) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using Statistical Quality Control (SQC) method.
(3) Positive current corresponds to current flowing into the device.
(4) Slew rate is the average of the rising and falling slew rates.
(5) The part is not short-circuit protected and is not recommended for operation with low resistive loads. Typical sourcing and sinking output current curves are provided in Typical Characteristics and should be consulted before designing for heavy loads.

6.6 5-V DC Electrical Characteristics

Unless otherwise specified, all limits are specified for TJ = 25°C, V+ = 5 V, V− = 0 V, VO = VCM = V+/2, and RL > 1 MΩ.
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
VOS Input offset voltage 0.1 ±1.5 mV
Over specified temperature range 2.7
TC VOS Input offset average drift 6.6 μV/°C
IB Input bias current See(3) 80 120 nA
IOS Input offset current 2.2 15 nA
CMRR Common-mode rejection ratio 0 ≤ VCM≤ 4 V 90 100 dB
Over specified temperature range 83
PSRR Power supply rejection ratio 3 V ≤ V+ ≤ 5 V, VCM = 0.5 V 87 95 dB
Over specified temperature range 81
2.7 V ≤ V+ ≤ 5.5 V, VCM = 0.5 V 87 95
Over specified temperature range 81
CMVR Input common-mode voltage range CMRR ≥ 80 dB
 0 4.1 V
CMRR ≥ 68 dB, over specified temperature range 0 4.1
AVOL Large signal voltage gain 0.3 ≤ VO ≤ 4.7 V, RL = 2 kΩ to V+/2
 79 84 dB
0.4 ≤ VO ≤ 4.6 V, RL = 2 kΩ to V+/2, over specified temperature range 76
0.3 ≤ VO ≤ 4.7 V, RL = 10 kΩ to V+/2
 87 94
0.4 ≤ VO ≤ 4.6 V, RL = 10 kΩ to V+/2, over specified temperature range 84
VO Output swing high RL = 2 kΩ to V+/2 120 140 mV from rail
Over specified temperature range 185
RL = 10 kΩ to V+/2 75 90
Over specified temperature range 120
Output swing low RL = 2 kΩ to V+/2 110 130
Over specified temperature range 150
RL = 10 kΩ to V+/2 70 80
Over specified temperature range 95
ISC Maximum continuous output current Sourcing(5) 18.5 mA
Sinking(5) 25
IS Supply current per amplifier LMV651 116 140 μA
Over specified temperature range 175
LMV652 118 140
Over specified temperature range 175
LMV654 122 140
Over specified temperature range 175
SR Slew rate AV = +1, VO = 1 VPP, 10% to 90%(4) 3.0 V/μs
GBW Gain bandwidth product 12 MHz
en Input-referred voltage noise f = 100 kHz 17 nV/√Hz
f = 1 kHz 17
in Input-referred current noise f = 100 kHz 0.1 pA/√Hz
f = 1 kHz 0.15
THD Total harmonic distortion f = 1 kHz, AV = 2, RL = 2 kΩ 0.003%
(1) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using Statistical Quality Control (SQC) method.
(3) Positive current corresponds to current flowing into the device.
(4) Slew rate is the average of the rising and falling slew rates.
(5) The part is not short-circuit protected and is not recommended for operation with low resistive loads. Typical sourcing and sinking output current curves are provided in Typical Characteristics and should be consulted before designing for heavy loads.

6.7 Typical Characteristics

Unless otherwise specified, TA= 25°C, VS= 5 V, V+= 5 V, V−= 0 V, VCM= VS/2
LMV651 LMV652 LMV654 20123834.gif Figure 1. Supply Current vs Supply Voltage (LMV651)
LMV651 LMV652 LMV654 20123864.gif Figure 3. Supply Current per Channel vs Supply Voltage (LMV654)
LMV651 LMV652 LMV654 20123826.gif Figure 5. VOS vs VCM
LMV651 LMV652 LMV654 20123823.gif Figure 7. IBIAS vs VCM
LMV651 LMV652 LMV654 20123822.gif Figure 9. IBIAS vs Supply Voltage
LMV651 LMV652 LMV654 20123829.gif Figure 11. Negative Output Swing vs Supply Voltage
LMV651 LMV652 LMV654 20123830.gif Figure 13. Negative Output Swing vs Supply Voltage
LMV651 LMV652 LMV654 20123833.gif Figure 15. Sinking Current vs Output Voltage (LMV651)
LMV651 LMV652 LMV654 20123863.gif Figure 17. Sinking Current vs Output Voltage (LMV654)
LMV651 LMV652 LMV654 20123812.gif Figure 19. Open-Loop Gain and Phase With Resistive Load
LMV651 LMV652 LMV654 20123814.gif Figure 21. Input-Referred Voltage Noise vs Frequency
LMV651 LMV652 LMV654 20123816.gif Figure 23. Slew Rate vs Supply Voltage
LMV651 LMV652 LMV654 20123810.gif Figure 25. THD+N vs VOUT
LMV651 LMV652 LMV654 20123808.gif Figure 27. THD+N vs Frequency
LMV651 LMV652 LMV654 20123817.gif Figure 29. Small Signal Transient Response
LMV651 LMV652 LMV654 20123835.gif Figure 31. PSRR vs Frequency
LMV651 LMV652 LMV654 20123837.gif Figure 33. Closed-Loop Output Impedance vs Frequency
LMV651 LMV652 LMV654 20123865.gif Figure 2. Supply Current per Channel vs Supply Voltage (LMV652)
LMV651 LMV652 LMV654 20123825.gif Figure 4. VOS vs VCM
LMV651 LMV652 LMV654 20123821.gif Figure 6. VOS vs Supply Voltage
LMV651 LMV652 LMV654 20123824.gif Figure 8. IBIAS vs VCM
LMV651 LMV652 LMV654 20123828.gif Figure 10. Positive Output Swing vs Supply Voltage
LMV651 LMV652 LMV654 20123827.gif Figure 12. Positive Output Swing vs Supply Voltage
LMV651 LMV652 LMV654 20123832.gif Figure 14. Sourcing Current vs Output Voltage
LMV651 LMV652 LMV654 20123866.gif Figure 16. Sinking Current vs Output Voltage (LMV652)
LMV651 LMV652 LMV654 20123811.gif Figure 18. Open-Loop Gain and Phase With Capacitive Load
LMV651 LMV652 LMV654 20123813.gif Figure 20. Phase Margin vs Capacitive Load (Stability)
LMV651 LMV652 LMV654 20123815.gif Figure 22. Input-Referred Current Noise vs Frequency
LMV651 LMV652 LMV654 20123809.gif Figure 24. THD+N vs VOUT
LMV651 LMV652 LMV654 20123807.gif Figure 26. THD+N vs Frequency
LMV651 LMV652 LMV654 20123818.gif Figure 28. Small Signal Transient Response
LMV651 LMV652 LMV654 20123819.gif Figure 30. Large Signal Transient Response
LMV651 LMV652 LMV654 20123836.gif Figure 32. CMRR vs Frequency