SNVS651H January   2010  – August 2015 LMZ12001

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 COT Control Circuit Overview
      2. 7.3.2 Output Overvoltage Comparator
      3. 7.3.3 Current Limit
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Zero Coil Current Detection
      6. 7.3.6 Prebiased Start-Up
    4. 7.4 Device Functional Modes
      1. 7.4.1 Discontinuous Conduction and Continuous Conduction Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Steps
        2. 8.2.2.2 Enable Divider, RENT and RENB Selection
        3. 8.2.2.3 Output Voltage Selection
        4. 8.2.2.4 Soft-Start Capacitor Selection
        5. 8.2.2.5 CO Selection
        6. 8.2.2.6 CIN Selection
        7. 8.2.2.7 RON Resistor Selection
          1. 8.2.2.7.1 Discontinuous Conduction and Continuous Conduction Mode Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Power Dissipation and Thermal Considerations
    4. 10.4 Power Module SMT Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)(2)(3)
MIN MAX UNIT
VIN, RON to GND –0.3 25 V
EN, FB, SS to GND –0.3 7 V
Junction Temperature 150 °C
Peak Reflow Case Temperature (30 sec) 245 °C
Storage Temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
(3) For soldering specifications, refer to the following document: SNOA549

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN 4.5 20 V
EN 0 6.5 V
Operation junction temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LMZ12001 UNIT
NDW
7 PINS
RθJA Junction-to-ambient thermal resistance 4-layer JEDEC Printed-Circuit-Board, No air flow 19.3 °C/W
2-layer JEDEC Printed-Circuit-Board, No air flow 21.5
RθJC(top) Junction-to-case (top) thermal resistance 1.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Limits in standard type are for TJ = 25°C unless otherwise specified. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 12 V, VOUT = 1.8 V(3).
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
SYSTEM PARAMETERS
ENABLE CONTROL
VEN EN threshold trip point VEN rising 1.18 V
apply over the junction temperature (TJ) range of –40°C to +125°C 1.1 1.25
VEN-HYS EN threshold hysteresis VEN falling 90 mV
SOFT-START
ISS SS source current VSS = 0 V 8 µA
apply over the junction temperature (TJ) range of –40°C to +125°C 5 11
ISS-DIS SS discharge current –200 µA
CURRENT LIMIT
ICL Current limit threshold DC average 2 A
apply over the junction temperature (TJ) range of –40°C to +125°C 1.4 3
ON/OFF TIMER
tON-MIN ON timer minimum pulse width 150 ns
tOFF OFF timer pulse width 260 ns
REGULATION AND OVERVOLTAGE COMPARATOR
VFB In-regulation feedback voltage VSS >+ 0.8 V
TJ = -40°C to 125°C
IO = 1 A		 0.798 V
apply over the junction temperature (TJ) range of –40°C to +125°C 0.777 0.818
VSS >+ 0.8 V
TJ = 25°C
IO = 10 mA		 0.786 0.802 0.818
VFB-OV Feedback overvoltage protection threshold 0.92 V
IFB Feedback input bias current 5 nA
IQ Non-switching input current VFB= 0.86 V 1 mA
ISD Shutdown quiescent current VEN= 0 V 25 μA
THERMAL CHARACTERISTICS(4)
TSD Thermal shutdown Rising 165 °C
TSD-HYST Thermal shutdown hysteresis Falling 15 °C
PERFORMANCE PARAMETERS
ΔVO Output voltage ripple 8 mV PP
ΔVO/ΔVIN Line regulation VIN = 8 V to 20 V, IO= 1 A 0.01%
ΔVO/ΔVIN Load regulation VIN = 12 V 1.5 mV/A
η Efficiency VIN = 12 V, VO = 1.8 V, IO = 1 A 85%
(1) Minimum and Maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
(3) EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See AN-2024 and layout for information on device under test.
(4) Theta JA measured on a 1.705-in x 3.0-in 4-layer board, with 1-oz. copper, thirty five thermal vias, no air flow, and 1-W power dissipation. Refer to PCB layout diagrams.

6.6 Typical Characteristics

Unless otherwise specified, the following conditions apply: VIN = 12 V; CIN = 10-µF X7R Ceramic; CO = 100-µF X7R Ceramic; TA = 25 C for efficiency curves and waveforms.
LMZ12001 30114851.gif
Figure 1. Efficiency 4.5-V Input at 25°C
LMZ12001 30114853.gif
Figure 3. Efficiency 5-V Input at 25°C
LMZ12001 30114821.gif
Figure 5. Efficiency 6-V Input at 25°C
LMZ12001 30114855.gif
Figure 7. Efficiency 8-V Input at 25°C
LMZ12001 30114803.gif
Figure 9. Efficiency 12-V Input at 25°C
LMZ12001 30114857.gif
Figure 11. Efficiency 20-V Input at 25°C
LMZ12001 30114859.gif
Figure 13. Efficiency 4.5-V Input at 85°C
LMZ12001 30114861.gif
Figure 15. Efficiency 5-V Input at 85°C
LMZ12001 30114833.gif
Figure 17. Efficiency 6-V Input at 85°C
LMZ12001 30114840.gif
Figure 19. Efficiency 8-V Input at 85°C
LMZ12001 30114842.gif
Figure 21. Efficiency 12-V Input at 85°C
LMZ12001 30114863.gif
Figure 23. Efficiency 20-V Input at 85°C
LMZ12001 30114848.gif
Figure 25. Line and Load Regulation at 25°C
LMZ12001 30114805.png
Figure 27. Output Ripple
12 VIN 3.3 VO 1 A
LMZ12001 30114865.gif
Figure 29. Current Limit 1.8 VOUT at 25°C
LMZ12001 30114868.gif
Figure 31. Current Limit 3.3 VOUT at 85°C
LMZ12001 30114852.gif
Figure 2. Dissipation 4.5-V Input at 25°C
LMZ12001 30114854.gif
Figure 4. Dissipation 5-V Input at 25°C
LMZ12001 30114822.gif
Figure 6. Dissipation 6-V Input at 25°C
LMZ12001 30114856.gif
Figure 8. Dissipation 8-V Input at 25°C
LMZ12001 30114804.gif
Figure 10. Dissipation 12-V Input at 25°C
LMZ12001 30114858.gif
Figure 12. Dissipation 20-V Input at 25°C
LMZ12001 30114860.gif
Figure 14. Dissipation 4.5-V Input at 85°C
LMZ12001 30114862.gif
Figure 16. Dissipation 5-V Input at 85°C
LMZ12001 30114834.gif
Figure 18. Dissipation 6-V Input at 85°C
LMZ12001 30114841.gif
Figure 20. Dissipation 8-V Input at 85°C
LMZ12001 30114843.gif
Figure 22. Dissipation 12-V Input at 85°C
LMZ12001 30114864.gif
Figure 24. Dissipation 20-V Input at 85°C
LMZ12001 30114869.gif
Figure 26. Line and Load Regulation at 85°C
LMZ12001 30114806.gif
Figure 28. Transient Response
12 VIN 3.3 VO 0.6-A to 1-A Step
LMZ12001 30114867.gif
Figure 30. Current Limit 3.3 VOUT at 25°C
LMZ12001 30114866.gif
Figure 32. Thermal Derating VOUT = 1.8 V