SNVS321O January   2005  – December 2015 LP38691 , LP38691-Q1 , LP38693 , LP38693-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LP38691 and LP38693
    3. 6.3 ESD Ratings: LP38691-Q1 and LP38693-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Thermal Overload Protection (TSD)
      3. 7.3.3 Foldback Current Limiting
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
      2. 7.4.2 Minimum Operating Input Voltage (VIN)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reverse Voltage
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Dissipation and Device Operation
        2. 8.2.2.2 External Capacitors
        3. 8.2.2.3 Input Capacitor
        4. 8.2.2.4 Output Capacitor
        5. 8.2.2.5 No-Load Stability
        6. 8.2.2.6 Capacitor Characteristics
        7. 8.2.2.7 RFI/EMI Susceptibility
        8. 8.2.2.8 Output Noise
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Detailed Description

7.1 Overview

The LP38691 and LP38693 are designed to meet the requirements of portable, battery-powered digital systems providing an accurate output voltage with fast start-up. When disabled via a low logic signal at the enable pin (EN), the power consumption is reduced to virtually zero (LP38693 only).

The LP38691 and LP38693 perform well with a single 1-μF input capacitor and a single 1-μF ceramic output capacitor.

7.2 Functional Block Diagrams

LP38691 LP38693 LP38691-Q1 LP38693-Q1 20126507.gif Figure 23. LP38691 Functional Diagram (WSON)
LP38691 LP38693 LP38691-Q1 LP38693-Q1 20126508.gif Figure 24. LP38691 Functional Diagram (TO-252)
LP38691 LP38693 LP38691-Q1 LP38693-Q1 20126509.gif Figure 25. LP38693 Functional Diagram (WSON)
LP38691 LP38693 LP38691-Q1 LP38693-Q1 20126510.gif Figure 26. LP38693 Functional Diagram (SOT-223)

7.3 Feature Description

7.3.1 Enable (EN)

The LP38693 has an Enable pin (EN) which allows an external control signal to turn the regulator output On and Off. The Enable On/Off threshold has no hysteresis. The voltage signal must rise and fall cleanly, and promptly, through the ON and OFF voltage thresholds. The EN pin voltage must be higher than the VEN(MIN) threshold to ensure that the device is fully enabled under all operating conditions. The EN pin voltage must be lower than the VEN(MAX) threshold to ensure that the device is fully disabled. The EN pin has no internal pullup or pulldown to establish a default condition and, as a result, this pin must be terminated either actively or passively. If the EN pin is driven from a source that actively pulls high and low, the drive voltage must not be allowed to go below ground potential or higher than VIN. If the application does not require the Enable function, the pin must be connected directly to the IN pin.

7.3.2 Thermal Overload Protection (TSD)

Thermal Shutdown disables the output when the junction temperature rises to approximately 160°C which allows the device to cool. When the junction temperature cools to approximately 150°C, the output circuitry enables.

Based on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This thermal cycling limits the dissipation of the regulator and protects it from damage as a result of overheating. The Thermal Shutdown circuitry of the LP38693 has been designed to protect against temporary thermal overload conditions.

The Thermal Shutdown circuitry was not intended to replace proper heat-sinking. Continuously running the LP38693 device into thermal shutdown degrades device reliability.

7.3.3 Foldback Current Limiting

Foldback current limiting is built into the LP38691 and LP38693 devices which reduces the amount of output current the part can deliver as the output voltage is reduced. The amount of load current is dependent on the differential voltage between the IN and OUT pins. Typically, when this differential voltage exceeds 5 V, the load current limits at about 350 mA. When the VIN – VOUT differential is reduced below 4 V, load current is limited to about 850 mA.

CAUTION

When toggling the LP38693 Enable (EN) after the input voltage (VIN) is applied, the foldback current limit circuitry is functional the first time that the EN pin is taken high. The foldback current limit circuitry is non-functional the second, and subsequent, times that the EN pin is taken high. Depending on the input and output capacitance values the input inrush current may be higher than expected which can cause the input voltage to droop.

If the EN pin is connected to the IN pin, the foldback current limit circuitry is functional when VIN is applied if VIN starts from less than 0.4 V.

7.4 Device Functional Modes

7.4.1 Enable (EN)

The EN pin voltage must be higher than the VEN(MIN) threshold to ensure that the device is fully enabled under all operating conditions.

7.4.2 Minimum Operating Input Voltage (VIN)

The LP38691 and LP38693 do not include any dedicated UVLO circuitry. Neither device internal circuitry is fully functional until VIN is at least 2.7 V. The output voltage is not regulated until VIN ≥ (VOUT + VDO), or 2.7 V, whichever is higher.