JAJSDC8F June   2017  – March 2021 OPA145 , OPA2145

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA145
    5. 6.5 Thermal Information: OPA2145
    6. 6.6 Electrical Characteristics: VS = 4.5 V to 36 V; ±2.25 V to ±18 V
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Capacitive Load and Stability
      2. 7.3.2 Output Current Limit
      3. 7.3.3 Noise Performance
      4. 7.3.4 Basic Noise Calculations
      5. 7.3.5 Phase-Reversal Protection
      6. 7.3.6 Electrical Overstress
      7. 7.3.7 EMI Rejection
      8. 7.3.8 EMIRR +IN Test Configuration
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 16-Bit, 100-kSPS, Fully Differential Transimpedance Imaging and Measurement
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ SImulation Software (Free Download)
        2. 11.1.1.2 WEBENCH Filter Designer Tool
        3. 11.1.1.3 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Detailed Design Procedure

The infinite-gain multiple-feedback circuit for a low-pass network function is shown in GUID-50FD19CA-3759-4890-85F7-1F884B2A61F8.html#SBOS4279106. Use #SBOS4278114 to calculate the voltage transfer function.

Equation 2. GUID-67985394-52F1-4802-919B-43010C6C154E-low.gif

This circuit produces a signal inversion. For this circuit, the gain at dc and the low-pass cutoff frequency are calculated by #SBOS4272832:

Equation 3. GUID-329BE6C0-9F97-480C-820C-A7EC31D204AE-low.gif

For systems which have different filter parameters or require specific system optimization, such as minimizing the system noise, an alternative device may be desired. A list of recommended alternatives can be found in Table 8-1.

Table 8-1 Alternative Devices
FEATURES PRODUCT
Low-power, 10-MHz FET input industrial op amp OPA140
2.2-nV/√ Hz, low-power, 36-V op amp in SOT-23 package OPA209
Low-noise, high-precision, 22-MHz, 4-nV/√ Hz JFET-input op amp OPA827
Low-noise, low IQ precision CMOS op amp OPA376
Low-power, precision, CMOS, rail-to-rail input/output, low-offset, low-bias op amp OPA191

Software tools are readily available to simplify filter design. WEBENCH® Filter Designer is a simple, powerful, and easy-to-use active filter design program. The WEBENCH® Filter Designer lets designers create optimized filter designs using a selection of TI operational amplifiers and passive components from TI's vendor partners.

Available as a web based tool from the WEBENCH Design Center, WEBENCH Filter Designer allows designers to design, optimize, and simulate complete multistage active filter solutions within minutes.