JAJSCP9 December   2016 OPA2836-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 OPA2836-Q1 Related Devices
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 2.7 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: VS = 2.7 V
      2. 7.7.2 Typical Characteristics: VS = 5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
      2. 8.3.2 Output Voltage Range
      3. 8.3.3 Low-Power Applications and the Effects of Resistor Values on Bandwidth
      4. 8.3.4 Driving Capacitive Loads
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (±1.25 V to ±2.75 V)
      2. 8.4.2 Single-Supply Operation (2.5 V to 5.5 V)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Noninverting Amplifier
      2. 9.1.2 Inverting Amplifier
      3. 9.1.3 Instrumentation Amplifier
      4. 9.1.4 Attenuators
      5. 9.1.5 Single-Ended-to-Differential Amplifier
      6. 9.1.6 Differential-to-Signal-Ended Amplifier
      7. 9.1.7 Differential-to-Differential Amplifier
      8. 9.1.8 Pulse Application With Single-Supply
      9. 9.1.9 ADC Driver Performance
    2. 9.2 Typical Applications
      1. 9.2.1 Audio-Frequency Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Active Filters
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
      2. 12.1.2 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

The OPA835DBV, OPA836DBV EVM (SLOU314) must be used as a reference when designing the circuit board. Follow the EVM layout of the external components near to the amplifier, ground plane construction, and power routing as closely as possible. General guidelines are:

  1. Signal routing must be direct and as short as possible into an out of the operational amplifier.
  2. The feedback path must be short and direct avoiding vias if possible especially with G = +1.
  3. Ground or power planes must be removed from directly under the negative input and output pins of the amplifier.
  4. A series output resistor is recommended to be placed as near to the output pin as possible. See Figure 17 for recommended values given expected capacitive load of design.
  5. A 2.2-µF power-supply decoupling capacitor must be placed within 2 inches of the device and can be shared with other operational amplifiers. For spit supply, a capacitor is required for both supplies.
  6. A 0.1-µF power-supply decoupling capacitor must be placed as near to the power supply pins as possible. Preferably within 0.1 inch. For split supply, a capacitor is required for both supplies.

11.2 Layout Example

OPA2836-Q1 layoutexample1.png Figure 78. Top Layer
OPA2836-Q1 layoutexample2.png Figure 79. Bottom Layer