SBOS218D Data sheet

SBOS218D December 2001 – May 2016 PGA2311

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

N|16
- MPDI002C
DW|16
- MSOI003I

サーマルパッド・メカニカル・データ

DW|16
- QFND313D

発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Supply voltage	V_A+		5.5	V
	V_A–		–5.5
	V_D+		5.5
	V_A+ to V_D+		< ±0.3
Analog input voltage		0	V_A+, V_A−	V
Digital input voltage		–0.3	V_D+	V
Operating temperature		–40	85	°C
Junction temperature			150	°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
PGA2311 in 16-Pin SOIC Package
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1500	V
PGA2311 in 16-Pin PDIP Package
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
V_A+	Positive analog power supply	4.75	5	5.25	V
V_A–	Negative analog power supply	–4.75	–5	–5.25	V
V_D+	Digital power supply	4.75	5	5.25	V
	Operating temperature	–40	25	85	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		PGA2311		UNIT
		N (PDIP)	DW (SOIC)
		16 PINS	16 PINS
R_θJA	Junction-to-ambient thermal resistance	39.9	83	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	26.2	44	°C/W
R_θJB	Junction-to-board thermal resistance	20.1	40.5	°C/W
ψ_JT	Junction-to-top characterization parameter	10.7	11.5	°C/W
ψ_JB	Junction-to-board characterization parameter	19.9	40.2	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	—	—	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At T_A = +25°C, V_A+ = +5 V, V_A− = –5 V, V_D+ = +5 V, R_L = 100 kΩ, C_L = 20 pF, BW measure = 10 Hz to 20 kHz, unless otherwise noted.

PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	UNIT
DC CHARACTERISTICS
	Step size					0.5		dB
	Gain error		Gain setting = 31.5 dB			±0.05		dB
	Gain matching					±0.05		dB
	Input resistance					10		kΩ
	Input capacitance		PGA2311P, U (U−grade)			3		pF
	Input capacitance		PGA2311PA, UA (A−grade)				7	pF
AC CHARACTERISTICS
	THD+N		V_IN = 2 Vrms, f = 1 kHz	PGA2311P, U (U−grade)		0.0004%	0.001%
	THD+N		V_IN = 2 Vrms, f = 1 kHz	PGA2311PA, UA (A−grade)		0.0002%	0.0004%
	Dynamic range		V_IN = AGND, gain = 0 dB		116	120		dB
	Voltage range, output		PGA2311P, U (U−grade)		(V_A−) + 1.25		(V_A+) –1.25	V
	Voltage range, output		PGA2311PA, UA (A−grade)		(V_A−) + 1.25		(V_A−) − 1.25	V
	Voltage range, input (without clipping)					2.5		Vrms
	Output noise		V_IN = AGND, gain = 0 dB			2.5	4	μV_RMS
	Interchannel crosstalk		f = 1 kHz			–130		dBFS
OUTPUT BUFFER
	Offset voltage		V_IN = AGND, gain = 0 dB			0.25	0.5	mV
	Load capacitance stability					100		pF
	Short-circuit current					50		mA
	Unity-gain bandwidth, small signal					10		MHz
DIGITAL CHARACTERISTICS
V_IH	High-level input voltage				2		V_D+	V
V_IL	Low-level input voltage				–0.3		0.8	V
V_OH	High-level output voltage		I_O = 200 μA	PGA2311P, U (U−grade)	(V_A+) − 1			V
V_OH	High-level output voltage		I_O = 200 μA	PGA2311PA, UA (A−grade)	(V_D+) − 1			V
V_OL	Low-level output voltage		I_O = –3.2 mA				0.4	V
	Input leakage current					1	10	µA
SWITCHING CHARACTERISTICS
f_SCLK	Serial clock (SCLK) frequency				0		6.25	MHz
t_PL	SCLK pulse duration low				80			ns
t_PH	SCLK pulse duration high				80			ns
t_MI	MUTE pulse duration low				2			ms
INPUT TIMING
t_SDS	SDI setup time				20			ns
t_SDH	SDI hold time				20			ns
t_CSCR	CS falling to SCLK rising				90			ns
t_CFCS	SCLK falling to CS rising				35			ns
OUTPUT TIMING
t_CSO	CS low to SDO active						35	ns
t_CFDO	SCLK falling to SDO data valid						60	ns
t_CSZ	CS high to SDO high impedance						100	ns
POWER SUPPLY
	Operating voltage	V_A+			4.75	5	5.25	V
		V_A–			–4.75	–5	–5.25
		V_D+			4.75	5	5.25
	Quiescent current	I_A+	V_A+ = +5 V			8	10	mA
		I_A–	V_A– = –5 V			10	12
		I_D+	V_D+ = +5 V			0.5	1
PSRR	Power-supply rejection ratio (250 Hz)					100		dB
TEMPERATURE RANGE
	Operating range				–40		85	°C

Figure 1. Serial Interface Protocol

Figure 2. Serial Interface Timing Requirements

6.6 Typical Characteristics

At T_A = +25°C, V_A+ = +5 V, V_A− = −5 V, V_D+ = +5 V, R_L = 100 kΩ, C_L = 20 pF, BW measure = 10 Hz to 20 kHz, unless otherwise noted. All plots taken with PGA2311 A-grade.