SCLS040G December   1982  – March 2015 SN74HC594

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: CL = 50 pF
    7. 6.7  Switching Characteristics: CL = 150 pF
    8. 6.8  Timing Requirements
    9. 6.9  Operating Characteristics
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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メカニカル・データ(パッケージ|ピン)
  • DW|16
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage –0.5 7 V
IIK Input clamp current(2) VI < 0 or VI > VCC –20 20 mA
IOK Output clamp current(2) VO < 0 or VO > VCC –20 20 mA
IO Continuous output current VO = 0 to VCC –35 35 mA
Continuous current through VCC or GND –70 70 mA
θJA Package thermal impedance(3) D package 73 °C/W
DW package 57
N package 67
Tstg Storage temperature –60 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
SN54HC594(2) SN74HC594 UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 2 5 6 2 5 6 V
VIH High-level input voltage VCC = 2 V 1.5 1.5 V
VCC = 4.5 V 3.15 3.15
VCC = 6 V 4.2 4.2
VIL Low-level input voltage VCC = 2 V 0.5 0.5 V
VCC = 4.5 V 1.35 1.35
VCC = 6 V 1.8 1.8
VI Input voltage 0 VCC 0 VCC V
VO Output voltage 0 VCC 0 VCC V
tt Input transition (rise and fall) rate VCC = 2 V 1000 1000 ns
VCC = 4.5 V 500 500
VCC = 6 V 400 400
TA Operating free-air temperature –55 125 –40 125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004.
(2) Product Preview

6.4 Thermal Information

THERMAL METRIC(1) SN74HC594 UNIT
N (PDIP) D (SOIC) DW (SOIC)
16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 41.3 72.3 71 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 28 33.2 32.3
RθJB Junction-to-board thermal resistance 21.3 29.9 35.9
ψJT Junction-to-top characterization parameter 12.6 5.3 6.7
ψJB Junction-to-board characterization parameter 21.1 29.6 35.3
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC TA = 25°C SN54HC594(1)
–55°C to 125°C
SN74HC594
–40°C to 85°C
SN74HC594
–40°C to 125°C
UNIT
MIN TYP MAX MIN MAX MIN MAX MIN MAX
VOH VI = VIH or VIL IOH = –20 µA 2 V 1.9 1.998 1.9 1.9 1.9 V
4.5 V 4.4 4.499 4.4 4.4 4.4
6 V 5.9 5.999 5.9 5.9 5.9
QH’ IOH = –4 mA 4.5 V 3.98 4.3 3.7 3.84 3.84
QA – QH IOH = –6 mA 3.98 4.3 3.7 3.84 3.84
QH’ IOH = –5.2 mA 6 V 5.48 5.8 5.2 5.34 5.34
QA – QH IOH = –7.8 mA 5.48 5.8 5.2 5.34 5.34
VOL VI = VIH or VIL IOL = 20 µA 2 V 0.002 0.1 0.1 0.1 0.1 V
4.5 V 0.001 0.1 0.1 0.1 0.1
6 V 0.001 0.1 0.1 0.1 0.1
QH’ IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33 0.33
QA – QH IOL = 6 mA 0.17 0.26 0.4 0.33 0.33
QH’ IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33 0.33
QA – QH IOL = 7.8 mA 0.15 0.26 0.4 0.33 0.33
II VI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 ±1000 nA
ICC VI = VCC or 0, IO = 0 6 V 8 160 80 80 µA
Ci 2 V to
6 V
3 10 10 10 pF
(1) Product Preview

6.6 Switching Characteristics: CL = 50 pF

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 4)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCC TA = 25°C SN54HC594(1)
–55°C to 125°C
SN74HC594
–40°C to 85°C
SN74HC594
–40°C to 125°C
UNIT
MIN TYP MAX MIN MAX MIN MAX MIN MAX
fmax 2 V 5 8 3.3 4 4 MHz
4.5 V 25 35 17 20 20
6 V 29 40 20 24 24
tpd SRCLK QH’ 2 V 50 150 225 185 200 ns
4.5 V 20 30 45 37 42
6 V 15 25 38 31 36
RCLK QA – QH 2 V 50 150 225 185 200
4.5 V 20 30 45 37 42
6 V 15 25 38 31 36
tPHL SRCLR QH’ 2 V 50 150 225 185 200 ns
4.5 V 20 30 45 37 42
6 V 15 25 38 31 36
RCLR QA – QH 2 V 50 125 185 155 170
4.5 V 20 25 37 31 36
6 V 15 21 31 26 31
tt QH’ 2 V 38 75 110 95 110 ns
4.5 V 8 15 22 19 21
6 V 6 13 19 16 18
QA – QH 2 V 38 60 90 75 85
4.5 V 8 12 18 15 17
6 V 6 10 15 13 15
(1) Product Preview

6.7 Switching Characteristics: CL = 150 pF

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 4)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCC TA = 25°C SN54HC594(1)
–55°C to 125°C
SN74HC594
–40°C to 85°C
SN74HC594
–40°C to 125°C
UNIT
MIN TYP MAX MIN MAX MIN MAX MIN MAX
tpd RCLK QA – QH 2 V 90 200 300 250 270 ns
4.5 V 23 40 60 50 55
6 V 19 34 51 43 48
tPHL RCLR QA – QH 2 V 90 200 300 250 270 ns
4.5 V 23 40 60 50 55
6 V 19 34 51 43 48
tt QA – QH 2 V 45 210 315 265 285 ns
4.5 V 17 42 63 53 58
6 V 13 36 53 45 50
(1) Product Preview

6.8 Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted)
VCC TA = 25°C SN54HC594(1)
–55°C to 125°C
SN74HC594
–40°C to 85°C
SN74HC594
–40°C to 125°C
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
fclock Clock frequency 2 V 5 3.3 4 4 MHz
4.5 V 25 17 20 20
6 V 29 20 24 24
tw Pulse duration SRCLK or RCLK high or low 2 V 100 150 125 130 ns
4.5 V 20 30 25 27
6 V 17 25 21 23
SRCLR or RCLR low 2 V 100 150 125 130
4.5 V 20 30 25 27
6 V 17 25 21 23
tsu Setup time before CLK↑ SER before SRCLK↑ 2 V 90 135 110 115 ns
4.5 V 18 27 22 24
6 V 15 23 19 21
SRCLK↑ before RCLK↑(2) 2 V 90 135 110 115
4.5 V 18 27 22 24
6 V 15 23 19 21
SRCLR low before RCLK↑ 2 V 50 75 63 68 ns
4.5 V 10 15 13 15
6 V 9 13 11 13
SRCLR high (inactive) before SRCLK↑ 2 V 20 20 20 20
4.5 V 10 10 10 10
6 V 10 10 10 10
RCLR high (inactive) before SRCLK↑ 2 V 5 5 5 5
4.5 V 5 5 5 5
6 V 5 5 5 5
th Hold time, SER after SRCLK↑ 2 V 5 5 5 5 ns
4.5 V 5 5 5 5
6 V 5 5 5 5
(1) Product Preview
(2) This setup time ensures that the output register receives stable data from the shift-register outputs. The clocks may be tied together, in which case the output register is one clock pulse behind the shift register.

6.9 Operating Characteristics

TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load 395 pF
SN54HC594 SN74HC594 timing_cls040.gifFigure 1. Timing Diagram

6.10 Typical Characteristics

SN54HC594 SN74HC594 typchar1.gifFigure 2. SN74HC594 TPD vs. Temperature
SN54HC594 SN74HC594 typchar2.gifFigure 3. SN74HC594 TPD vs. VCC