SCES295Z June   2000  – November 2017 SN74LVC1G06

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristifcs
    6. 6.6 Switching Characteristics: -40°C to +85°C
    7. 6.7 Switching Characteristics: -40°C to +125°C
    8. 6.8 Operating Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CMOS Open-Drain Outputs
      2. 8.3.2 Standard CMOS Inputs
      3. 8.3.3 Negative Clamping Diodes
      4. 8.3.4 Partial Power Down (Ioff)
      5. 8.3.5 Over-voltage Tolerant Inputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DPW|5
  • DBV|5
  • DSF|6
  • DCK|5
  • YZV|4
  • DRL|5
  • YZP|5
  • DRY|6
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • ESD Protection Exceeds JESD 22
    • 2000-V Human Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments
    NanoFree™ Package
  • Supports 5-V VCC Operation
  • Input and Open-Drain Output Accept
    Voltages up to 5.5 V
  • Maximum tpd of 4.5 ns at 3.3 V at 125°C
  • Low Power Consumption, 10-µA Maximum ICC
  • ±24-mA Output Drive at 3.3 V for open-drain devices
  • Ioff Supports Partial-Power-Down Mode and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • Can Be Used For Up or Down Translation
  • Schmitt Trigger Action on All Ports

2 Applications

  • AV Receivers
  • Blu-ray Players and Home Theaters
  • DVD Recorders and Players
  • Desktop or Notebook PCs
  • Digital Radio or Internet Radio Players
  • Digital Video Cameras (DVC)
  • Embedded PCs
  • GPS: Personal Navigation Devices
  • Mobile Internet Devices
  • Network Projector Front-Ends
  • Portable Media Players
  • Pro Audio Mixers
  • Smoke Detectors
  • Solid State Drive (SSD): Enterprise
  • High-Definition (HDTV)
  • Tablets: Enterprise
  • Audio Docks: Portable
  • DLP Front Projection Systems
  • DVR and DVS
  • Digital Picture Frame (DPF)
  • Digital Still Cameras

3 Description

This single inverter buffer and driver is designed for 1.65-V to 5.5-V VCC operation.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

The output of the SN74LVC1G06 device is open-drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.

This device is fully specified for partial-power-down applications using Ioff.The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LVC1G06DBV SOT-23 (5) 2.90 mm × 1.60 mm
SN74LVC1G06DCK SC70 (5) 2.00 mm × 1.25 mm
SN74LVC1G06DRL SOT-5X3 (5) 1.60 mm × 1.20 mm
SN74LVC1G06DRY SON (6) 1.45 mm × 1.00 mm
SN74LVC1G06DSF SON (6) 1.00 mm x 1.00 mm
SN74LVC1G06YZP DSBGA (5) 1.40 mm × 0.90 mm
SN74LVC1G06YZV DSBGA (4) 0.90 mm × 0.90 mm
SN74LVC1G06DPW X2SON (5) 0.80 mm x 0.80 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)

SN74LVC1G06 ld1_ces295.gif