JAJSUL0P January   1993  – May 2024 SN54LVC257A , SN74LVC257A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics, SN54LVC257A
    7. 5.7 Switching Characteristics, SN74LVC257A
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9.   Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
      2. 8.1.2 Related Links
    2. 8.2 Community Resources
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configuration and Functions

SN54LVC257A SN74LVC257A D, DB, NS, J, W, or PW Package;16-Pin SOIC, SSOP, SO, CDIP, CFP, or TSSOP(Top View)Figure 4-1 D, DB, NS, J, W, or PW Package;16-Pin SOIC, SSOP, SO, CDIP, CFP, or TSSOP(Top View)
SN54LVC257A SN74LVC257A BQB or RGY Package;16-Pin WQFN or VQFN with Exposed Thermal Pad(Top View)Figure 4-2 BQB or RGY Package;16-Pin WQFN or VQFN with Exposed Thermal Pad(Top View)
SN54LVC257A SN74LVC257A FK Package,20-Pin LCCCTop View Figure 4-3 FK Package,20-Pin LCCCTop View
PIN I/O DESCRIPTION
NAME SOIC, SSOP, SO, CDIP, CFP, TSSOP, WQFN, or VQFN LCCC
A/B 1 2 I Select Pin, Low selects A, High selects B
1A 2 3 I/O Multiplexer Signal Input
1B 3 4 I/O Multiplexer Signal Input
1Y 4 5 I/O Multiplexer Output
2A 5 7 I/O Multiplexer Signal Input
2B 6 8 I/O Multiplexer Signal Input
2Y 7 9 I/O Multiplexer Output
3A 11 14 I/O Multiplexer Signal Input
3B 10 13 I/O Multiplexer Signal Input
3Y 9 12 I/O Multiplexer Output
4A 14 18 I/O Multiplexer Signal Input
4B 13 17 I/O Multiplexer Signal Input
4Y 12 15 I/O Multiplexer Output
GND 8 10 — Ground
NC(1) — 1, 6, 11, 16 — No connect
OE 15 19 I/O Active low Output enable
VCC 16 20 — Power pin
(1) NC – no internal connection