JAJSM14B June   2021  – October 2023 TCA39306-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics (Translating Down)
    7. 5.7 Switching Characteristics (Translating Up)
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Definition of threshold voltage
      2. 7.1.2 Correct Device Set Up
      3. 7.1.3 Disconnecting a Target from the Main Bus Using the EN Pin
      4. 7.1.4 Supporting Remote Board Insertion to Backplane with TCA39306-Q1
      5. 7.1.5 Switch Configuration
      6. 7.1.6 Controller on Side 1 or Side 2 of Device
      7. 7.1.7 LDO and TCA39306-Q1 Concerns
      8. 7.1.8 Current Limiting Resistance on VREF2
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN) Pin
      2. 7.3.2 Voltage Translation
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 General Applications of I2C
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Bidirectional Voltage Translation
        2. 8.2.2.2 Sizing Pullup Resistors
        3. 8.2.2.3 Bandwidth
      3. 8.2.3 Application Curve
    3. 8.3 Systems Examples: I3C Usage Considerations
      1. 8.3.1 I3C Bus Switching
      2. 8.3.2 I3C Bus Voltage Translation
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

I3C Bus Voltage Translation

Bus voltage translation is when the bus voltage is translated up or down. This presents a unique challenge with I3C for FET-based translators, like the TCA39306-Q1, because they rely on a pull-up resistor to translate the voltage up from the low-voltage side. The pull-up resistor selected must be strong enough to meet the timing requirements (based on bus capacitance and translation voltages), but not so strong to violate the VIL requirements of the I3C devices.

The pull-up resistors are needed on both sides. The reason for this is that with the normal translation setup, the switch is "on" when either side's bus voltage drops to roughly VPU_1. This means that the pull-up resistors are required to pull the bus voltage on the high-voltage side from VPU_1 to VPU_2. When the device on the high-voltage side is controlling the bus, the switch will turn off at VPU_1. The pull-up resistors on the low-voltage side are used to bleed off any additional current that might "leak" through the switch.

GUID-20211209-SS0I-KNSB-9MQ0-8039KHLZDLNL-low.svg Figure 8-7 I3C Bus Translation