JAJSMZ9 September   2021 TLIN1024A-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings - IEC
    4. 7.4 Thermal Information
    5. 7.5 Recommended Operating Conditions
    6. 7.6 Electrical Characteristics
    7. 7.7 Duty Cycle Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  LIN (Local Interconnect Network) Bus
        1. 9.3.1.1 LIN Transmitter Characteristics
        2. 9.3.1.2 LIN Receiver Characteristics
          1. 9.3.1.2.1 Termination
      2. 9.3.2  TXD (Transmit Input and Output)
      3. 9.3.3  RXD (Receive Output)
      4. 9.3.4  VSUP1/2 (Supply Voltage)
      5. 9.3.5  GND1/2 (Ground)
      6. 9.3.6  EN (Enable Input)
      7. 9.3.7  Protection Features
      8. 9.3.8  TXD Dominant Time Out (DTO)
      9. 9.3.9  Bus Stuck Dominant System Fault: False Wake-Up Lockout
      10. 9.3.10 Thermal Shutdown
      11. 9.3.11 Under Voltage on VSUP
      12. 9.3.12 Unpowered Device and LIN Bus
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Sleep Mode
      3. 9.4.3 Standby Mode
      4. 9.4.4 Wake-Up Events
        1. 9.4.4.1 Wake-Up Request (RXD)
        2. 9.4.4.2 Mode Transitions
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Detailed Design Procedures
        2. 10.2.1.2 Normal Mode Application Note
        3. 10.2.1.3 Standby Mode Application Note
        4. 10.2.1.4 TXD Dominant State Timeout Application Note
      2. 10.2.2 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Parameter Measurement Information

GUID-B65C062C-862D-47CC-A680-F010AE8B9611-low.gif Figure 8-1 Test System: Operating Voltage Range with RX and TX Access
GUID-20210827-SS0I-ZJBK-00RN-GDZLNM5PDFLL-low.gif Figure 8-2 RX Response: Operating Voltage Range
GUID-EDB6577F-CB23-4903-923E-FDA7204909F2-low.gif Figure 8-3 LIN Bus Input Signal
GUID-20210819-SS0I-BJ88-WZ7T-HVCTKHBPHNFZ-low.gif Figure 8-4 LIN Receiver Test with RX Access
GUID-20210819-SS0I-MMDQ-RCKB-KNZGKJG87SKM-low.gif Figure 8-5 VSUP_NON_OP
GUID-20210819-SS0I-JKMF-XKLH-BQ2ZKMDDDCC4-low.gif Figure 8-6 Test Circuit for IBUS_PAS_dom; TXD = Recessive State VBUS = 0 V
GUID-20210819-SS0I-PJ79-MK2P-KJ5ZNCG6NWT6-low.gif Figure 8-7 Test Circuit for IBUS_PAS_rec
GUID-20210819-SS0I-MMRC-GCR8-BCBJM7VHQLSR-low.gif Figure 8-8 Test Circuit for IBUS_NO_GND Loss of GND
GUID-20210819-SS0I-QPPK-3LS9-TRJ2DN7V04GK-low.gif Figure 8-9 Test Circuit for IBUS_NO_BAT Loss of Battery
GUID-20210819-SS0I-XZL2-KB2P-LX8ZGBRSJCGG-low.gif Figure 8-10 Test Circuit Slope Control and Duty Cycle
GUID-20201008-CA0I-JSCB-SGN4-M67L4L6VZJ2R-low.gif Figure 8-11 Definition of Bus Timing Parameters
GUID-20210819-SS0I-X5PF-PLFF-76FRRJK1G52G-low.gif Figure 8-12 Propagation Delay Test Circuit
GUID-20201008-CA0I-XN1L-G1VK-7ZGNNHNZZ9G2-low.gif Figure 8-13 Propagation Delay
GUID-7F7B18A7-5F82-45FF-B9AD-3E567F9BE117-low.gif Figure 8-14 Mode Transitions
GUID-20210827-SS0I-WRT4-PTVQ-KSSMBB1VTR91-low.gif Figure 8-15 Wake-Up Through EN
GUID-20210827-SS0I-MM7G-DVZ0-1F7Q7CFH90LX-low.gif Figure 8-16 Wake-Up Through LIN