JAJSFF0D February   2019  – August 2021 TLV9301 , TLV9302 , TLV9304

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Protection Circuitry
      2. 7.3.2 EMI Rejection
      3. 7.3.3 Phase Reversal Protection
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 Common-Mode Voltage Range
      7. 7.3.7 Electrical Overstress
      8. 7.3.8 Overload Recovery
      9. 7.3.9 Typical Specifications and Distributions
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High Voltage Precision Comparator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.7 Electrical Characteristics

For VS = (V+) – (V–) = 4.5 V to 40 V (±2.25 V to ±20 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage VCM = V– ±0.5 ±2.5 mV
TA = –40°C to 125°C ±2.75
dVOS/dT Input offset voltage drift TA = –40°C to 125°C ±2 µV/℃
PSRR Input offset voltage versus power supply VCM = V– TA = –40°C to 125°C ±2 ±5 µV/V
Channel separation f = 0 Hz 5 µV/V
INPUT BIAS CURRENT
IB Input bias current ±10 pA
IOS Input offset current ±10 pA
NOISE
EN Input voltage noise f = 0.1 Hz to 10 Hz   6 µVPP
  1   µVRMS
eN Input voltage noise density f = 1 kHz 33   nV/√Hz
f = 10 kHz   30  
iN Input current noise f = 1 kHz   5   fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) – 0.2 (V+) – 2 V
CMRR Common-mode rejection ratio VS = 40 V, (V–) – 0.1 V < VCM < (V+) – 2 V TA = –40°C to 125°C 95 110 dB
VS = 4.5 V, (V–) – 0.1 V < VCM < (V+) – 2 V 90
(V+) – 2 V < VCM < (V+) + 0.1 V See Common-Mode Voltage Range
INPUT CAPACITANCE
ZID Differential 110 || 4 MΩ || pF
ZICM Common-mode 6 || 1.5 TΩ || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 40 V, VCM = V–
(V–) + 0.1 V < VO < (V+) –  0.1 V		 120 130 dB
TA = –40°C to 125°C 116 127
FREQUENCY RESPONSE
GBW Gain-bandwidth product 1 MHz
SR Slew rate VS = 40 V, G = +1, CL = 20 pF 3 V/µs
tS Settling time To 0.1%, VS = 40 V, VSTEP = 10 V , G = +1, CL = 20 pF 5 µs
To 0.1%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20 pF 2.5
To 0.01%, VS = 40 V, VSTEP = 10 V , G = +1, CL = 20 pF 6
To 0.01%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20 pF 3.5
Phase margin G = +1, RL = 10 kΩ, CL = 20 pF 60 °
Overload recovery time VIN  × gain > VS 1 µs
THD+N Total harmonic distortion + noise VS = 40 V, VO = 1 VRMS, G = -1, f = 1 kHz 0.003%
OUTPUT
  Voltage output swing from rail Positive and negative rail headroom VS = 40 V, RL = no load   3 mV
VS = 40 V, RL = 10 kΩ   50 75
VS = 40 V, RL = 2 kΩ   250 350
VS = 4.5 V, RL = no load   1
VS = 4.5 V, RL = 10 kΩ   20 30
VS = 4.5 V, RL = 2 kΩ   40 75
ISC Short-circuit current ±60 mA
CLOAD Capacitive load drive See Typical Characteristics
ZO Open-loop output impedance f = 1 MHz, IO = 0 A 600 Ω
POWER SUPPLY
IQ Quiescent current per amplifier IO = 0 A 150 175 µA
TA = –40°C to 125°C 175