SLVSBP3C December   2012  – May 2015 TPD5S116

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Voltage Level Shifter, SCL, SDA Lines
    7. 7.7  Voltage Level Shifter, CEC Line
    8. 7.8  Voltage Level Shifter, HPD Line
    9. 7.9  EN
    10. 7.10 Utility Pin
    11. 7.11 I/O Capacitances
    12. 7.12 Dynamic Load Characteristics
    13. 7.13 SCL, SDA Lines, VCCA = 1.2 V
    14. 7.14 CEC Line, VCCA = 1.2 V
    15. 7.15 HPD Line, VCCA = 1.2 V
    16. 7.16 SCL, SDA Lines, VCCA = 1.5 V
    17. 7.17 CEC Line, VCCA = 1.5 V
    18. 7.18 HPD Line, VCCA = 1.5 V
    19. 7.19 SCL, SDA Lines, VCCA = 1.8 V
    20. 7.20 CEC Line, VCCA = 1.8 V
    21. 7.21 HPD Line, VCCA = 1.8 V
    22. 7.22 SCL, SDA Lines, VCCA = 2.5 V
    23. 7.23 CEC Line, VCCA = 2.5 V
    24. 7.24 HPD Line, VCCA = 2.5 V
    25. 7.25 SCL, SDA Lines, VCCA = 3.3 V
    26. 7.26 CEC Line, VCCA = 3.3 V
    27. 7.27 HPD Line, VCCA = 3.3 V
    28. 7.28 SCL, SDA Lines, VCCA = 5 V
    29. 7.29 CEC Line, VCCA = 5 V
    30. 7.30 HPD Line, VCCA = 5 V
    31. 7.31 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  IEC 61000-4-2 Level 4 ESD Protection
      2. 8.3.2  Conforms to HDMI Control and 5VOUT Compliance Tests Without External Components
      3. 8.3.3  Auto-direction Sensing I2C Level Shifter with One-Shot Circuit to Drive Long HDMI Cable (750-pF Load)
      4. 8.3.4  Back Drive Protection
      5. 8.3.5  55-mA Load Switch with Short Circuit Protection
      6. 8.3.6  Hot Plug Detect Module with Pull Down Resistor
      7. 8.3.7  Integrated Pull-up and Pull-down Resistors per HDMI Specification
      8. 8.3.8  Utility Pin ESD Protection for Ethernet and Audio Return
      9. 8.3.9  DDC/CEC LEVEL SHIFT Circuit Operation
      10. 8.3.10 DDC/CEC Level Shifter Operational Notes For VCCA = 1.8V
      11. 8.3.11 Rise-Time Accelerators
      12. 8.3.12 Noise Considerations
      13. 8.3.13 HDMI Compliance
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementations
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Resistor Pull-Up Value Selection
        2. 9.2.2.2 Input Capacitor (Optional)
        3. 9.2.2.3 Output Capacitor (Optional)
      3. 9.2.3 Application Curve
  10. 10Power Supply Requirements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11 Layout

11.1 Layout Guidelines

  • The optimum placement is as close to the connector as possible.
    • EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces, resulting in early system failures. Therefore, the PCB designer needs to minimize the possibility of EMI coupling by keeping any unprotected traces away from the protected traces which are between the TVS and the connector.
  • Route the protected traces as straight as possible.
  • Avoid using VIAs between the connecter and an I/O protection pin on TPD5S116.
  • Avoid 90º turns in traces.
    • Electric fields tend to build up on corners, increasing EMI coupling.
  • Minimize impedance on the path to GND for maximum ESD dissipation.
  • The capacitors on 5V_CON and 5V_SYS should be placed close to their respective pins on TPD5S116.

11.2 Layout Example

TPD5S116 layout_slvsbp3.gifFigure 22. TPD5S116 HDMI Layout Example