JAJSF49 April   2018 TPS22810-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     概略回路図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical DC Characteristics
    8. 6.8 Typical AC Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 On and Off Control
      2. 8.3.2 Quick Output Discharge (QOD)
        1. 8.3.2.1 QOD when System Power is Removed
        2. 8.3.2.2 Internal QOD Considerations
      3. 8.3.3 EN/UVLO
      4. 8.3.4 Adjustable Rise Time (CT)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 ON and OFF Control
      2. 9.1.2 Input Capacitor (Optional)
      3. 9.1.3 Output Capacitor (Optional)
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Shutdown Sequencing During Unexpected Power Loss
        2. 9.2.2.2 VIN to VOUT Voltage Drop
        3. 9.2.2.3 Inrush Current
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Thermal Considerations

For best performance, all traces must be as short as possible. To be most effective, the input and output capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short-circuit operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance.

The maximum IC junction temperature must be restricted to 150°C under normal operating conditions. To calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, use Equation 14.

Equation 14. TPS22810-Q1 Q5_PDmax2_slvsco0.gif

where

  • PD(MAX) is the maximum allowable power dissipation
  • TJ(MAX) is the maximum allowable junction temperature (150°C for the TPS22810-Q1)
  • TA is the ambient temperature of the device
  • θJA is the junction to air thermal impedance. Refer to the Thermal Information table. This parameter highly depends on the board layout.