JAJSRQ0A October   2023  – February 2024 TPS274C65CP

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Diagrams
      2. 8.3.2 Programmable Current Limit
      3. 8.3.3 Protection Mechanisms
        1. 8.3.3.1 Over-current Protection
        2. 8.3.3.2 Short-Circuit Protection
          1. 8.3.3.2.1 VS During Short-to-Ground
        3. 8.3.3.3 Thermal Shutdown Behavior
        4. 8.3.3.4 Inductive-Load Switching-Off Clamp
        5. 8.3.3.5 Inductive Load Demagnetization
        6. 8.3.3.6 Thermal Shutdown
        7. 8.3.3.7 Undervoltage Protection on VS (UVP)
        8. 8.3.3.8 Undervoltage Lockout on Low Voltage Supply (VDD_UVLO)
        9. 8.3.3.9 Power-Up and Power-Down Behavior
      4. 8.3.4 Diagnostic Mechanisms
        1. 8.3.4.1 Fault Indication
        2. 8.3.4.2 Short-to-Battery and Open-Load Detection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Off
      2. 8.4.2 Active
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 IEC 61000-4-5 Surge
        2. 9.2.2.2 Loss of GND
        3. 9.2.2.3 Paralleling Channels
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-20231016-SS0I-0RL9-ZBLM-FWBH1VGFJ2NF-low.svg Figure 5-1 RHA Package, 40-Pin VQFN (Top View)
Table 5-1 Pinout - Version CP, CPH
PIN TYPE(1) DESCRIPTION
NO. NAME
1 DNC — Do not connect.
2 VS_FLT O Supply fault output – open drain, pull up with a 4.7K resistor to VDD pin.
3 DIAG_EN I Enable diagnostics.
4 VDD P Logic supply input(2).
7 EN3 I Enable Ch3 output.
8 EN2 I Enable Ch2 output.
9 EN1 I Enable Ch1 output.
10 EN4 I Enable Ch4 output.
30 ILIMCFG I Current limit configuration pin – set the 3-bit setting of the current limit with a resistor to the GND pin of the IC.
29 REG_EN I Internal regulator enable pin, float to enable. Tie to the GND pin of the IC to disable and use an external supply input to VDD.
28 LATCH I Configure the device in latch (on fault) mode when the pin is pulled HI. Set the pin LO for auto-retry on fault.
22 ST1 O CH1 fault status, open drain, pull up with a 4.7K resistor to VDD pin.
23 ST2 O CH2 fault status, open drain, pull up with a 4.7K resistor to VDD pin.
24 ST3 O CH3 fault status, open drain, pull up with a 4.7K resistor to VDD pin.
25 ST4 O CH4 fault status, open drain, pull up with a 4.7K resistor to VDD pin.
6,26,27,20 DNC — Do not connect.
14-17 VS P 24V switch supply input to the IC.
38,39 OUT1 O OUT1
32,33 OUT2 O OUT2
12,13 OUT3 O OUT3
18,19 OUT4 O OUT4
34-37 VS P 24V switch supply input to the IC.
21,5 GND — Device ground.
40,31,11,20 DNC — Do not connect.
Exposed Pad GND I Connect to the GND pin of the IC.
(1) I = input, O = output, P = power
(2) When the device is configured to support an external regulator connected to VDD, the
supply input for the external regulator must be derived from the same VS supply of TPS274C65CP, as shown in the Typical Application Schematic.