JAJSHA7C February   2018  – February 2020 TPS2HB16-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
    2. 6.1 Recommended Connections for Unused Pins
  7. 7 Specifications
    1. Table 3. Absolute Maximum Ratings
    2. Table 4. ESD Ratings
    3. Table 5. Recommended Operating Conditions
    4. Table 6. Thermal Information
    5. Table 7. Electrical Characteristics
    6. Table 8. SNS Timing Characteristics
    7. Table 9. Switching Characteristics
    8. 7.1      Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Protection Mechanisms
        1. 9.3.1.1 Thermal Shutdown
        2. 9.3.1.2 Current Limit
          1. 9.3.1.2.1 Current Limit Foldback
          2. 9.3.1.2.2 Programmable Current Limit
          3. 9.3.1.2.3 Undervoltage Lockout (UVLO)
          4. 9.3.1.2.4 VBB During Short-to-Ground
        3. 9.3.1.3 Voltage Transients
          1. 9.3.1.3.1 Load Dump
        4. 9.3.1.4 Driving Inductive Loads
        5. 9.3.1.5 Reverse Battery
        6. 9.3.1.6 Fault Event – Timing Diagrams (Version A/B)
      2. 9.3.2 Fault Event – Timing Diagrams - Version F
      3. 9.3.3 Diagnostic Mechanisms
        1. 9.3.3.1 VOUTx Short-to-Battery and Open-Load
          1. 9.3.3.1.1 Detection With Switch Enabled
          2. 9.3.3.1.2 Detection With Switch Disabled
        2. 9.3.3.2 SNS Output
          1. 9.3.3.2.1 RSNS Value
            1. 9.3.3.2.1.1 High Accuracy Load Current Sense
            2. 9.3.3.2.1.2 SNS Output Filter
        3. 9.3.3.3 Fault Indication and SNS Mux
        4. 9.3.3.4 Resistor Sharing
        5. 9.3.3.5 High-Frequency, Low Duty-Cycle Current Sensing
    4. 9.4 Device Functional Modes
      1. 9.4.1 Off
      2. 9.4.2 Standby
      3. 9.4.3 Diagnostic
      4. 9.4.4 Standby Delay
      5. 9.4.5 Active
      6. 9.4.6 Fault
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Ground Protection Network
      2. 10.1.2 Interface With Microcontroller
      3. 10.1.3 I/O Protection
      4. 10.1.4 Inverse Current
      5. 10.1.5 Loss of GND
      6. 10.1.6 Automotive Standards
        1. 10.1.6.1 ISO7637-2
        2. 10.1.6.2 AEC – Q100-012 Short Circuit Reliability
      7. 10.1.7 Thermal Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
      4. 10.2.4 Design Requirements
      5. 10.2.5 Detailed Design Procedure
      6. 10.2.6 Application Curves
    3. 10.3 Typical Application
      1. 10.3.1 Design Requirements
      2. 10.3.2 Detailed Design Procedure
        1. 10.3.2.1 Thermal Considerations
        2. 10.3.2.2 RILIM Calculation
        3. 10.3.2.3 Diagnostics
          1. 10.3.2.3.1 Selecting the RSNS Value
      3. 10.3.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
      1. 13.1.1 関連資料
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 サポート・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10.1.6.2 AEC – Q100-012 Short Circuit Reliability

The TPS2HB16-Q1 is tested according to the AEC-Q100-012 Short Circuit Reliability standard. This test is performed to demonstrate the robustness of the device against VOUT short-to-ground events. Test conditions and test procedures are summarized in Table 15. For further details, refer to the AEC - Q100-012 standard document.

Test conditions:

  • LATCH = 0 V
  • ILIM = N/A (Version F)
  • 10 units from 3 separate lots for a total of 30 units
  • Lsupply = 5 μH, Rsupply = 10 mΩ
  • VBB = 14 V

Test procedure:

  • Parametric data is collected on each unit pre-stress.
  • Each unit is enabled into a short-circuit with the required short circuit cycles or duration as specified.
  • Functional testing is performed on each unit post-stress to verify that the part still operates as expected.

The cold repetitive test is run at 85ºC which is the worst case condition for the device to sustain a short circuit. The cold repetitive test refers to the device being given time to cool down between pulses, rather than being run at a cold temperature. The load short circuit is the worst case situation, since the energy stored in the cable inductance can cause additional harm. The fast response of the device ensures current limiting occurs quickly and at a current close to the load short condition. In addition, the hot repetitive test is performed as well.

Table 15. AEC - Q100-012 Test Results

TEST LOCATION OF SHORT DEVICE VERSION NO. OF CYCLES / DURATION NO. OF UNITS NO. OF FAILS
Cold Repetitive - Long Pulse Load Short Circuit, Lshort = 5 μH, Rshort = 100 mΩ, TA = 85ºC F 100 k cycles 30 0
Hot Repetitive - Long Pulse Load Short Circuit, Lshort = 5 μH, Rshort = 100 mΩ, TA = 25ºC F 100 hours 30 0