JAJSTG4C April   2015  – March 2024 TPS3702-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input (SENSE)
      2. 6.3.2 Outputs (UV, OV)
      3. 6.3.3 User-Configurable Accuracy Band (SET)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation (VDD > UVLO)
      2. 6.4.2 Undervoltage Lockout (V(POR) < VDD < UVLO)
      3. 6.4.3 Power-On Reset (VDD < V(POR))
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Window Voltage Detector Considerations
      2. 7.1.2 Input and Output Configurations
      3. 7.1.3 Immunity to SENSE Pin Voltage Transients
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5.5 Electrical Characteristics

At 2V ≤ VDD ≤ 18V, 1V ≤ VSENSE ≤ 5V, and over the operating free-air temperature range of –40°C to 125°C, unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VDDSupply voltage range218V
VIT+(OV)Positive-going threshold accuracyVSET ≤ VIL(SET), VSET ≥ VIH(SET)–0.9%±0.25%0.9%
VIT–(UV)Negative-going threshold accuracyVSET ≤ VIL(SET), VSET ≥ VIH(SET)–0.9%±0.25%0.9%
VHYSHysteresis voltage(2)TPS3702xXx0.3%0.55%0.8%
V(POR)Power-on reset voltage(1)VOL(max) = 0.25V, IOUT = 15µA0.8V
IDDSupply currentVDD = 2V6.010µA
VDD ≥ 5V7.012
ISENSEInput current, SENSE pinVSENSE = 5V11.5µA
ISETInternal pull-up current, SET pinVDD = 18V, SET pin = GND600nA
VOLLow-level output voltageVDD = 1.3V, IOUT = 0.4mA250mV
VDD = 2V, IOUT = 3mA250
VDD = 5V, IOUT = 5mA250
VIL(set)Low-level SET pin input voltage250mV
VIH(set)High-level SET pin input voltage750mV
ID(leak)Open-drain output leakage currentVPU = VDD300nA
ILKG(od)VDD = 2V, VPU = 18V300
UVLOUndervoltage lockout(3)VDD falling1.31.7V
(1) The outputs are undetermined below V(POR).
(2) Hysteresis is 0.55% of the nominal trip point.
(3) When VDD falls below UVLO, UV is driven low and OV goes to high impedance.