JAJSK76 September   2022 TPS51383

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  PWM Operation and D-CAP3 Control Mode
      2. 7.3.2  VCC LDO
      3. 7.3.3  Soft Start
      4. 7.3.4  Enable Control
      5. 7.3.5  Power Good
      6. 7.3.6  Overcurrent Protection and Undervoltage Protection
      7. 7.3.7  100-mA LDO with Switch Over
      8. 7.3.8  UVLO Protection
      9. 7.3.9  Overvoltage Protection
      10. 7.3.10 Output Voltage Discharge
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
      2. 7.4.2 Out-Of-Audio™ Mode
      3. 7.4.3 Power Save Mode (PSM)
  8. 8  Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Component Selection
          1. 8.2.2.1.1 Inductor Selection
          2. 8.2.2.1.2 Output Capacitor Selection
          3. 8.2.2.1.3 Input Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The TPS51383 and TPS51384 are synchronous step-down buck converters that can operate from 4.5-V to 24-V input voltage (VIN). TPS51383 features fixed 3.36-V output, and TPS51384 features fixed 1.82-V output. Both devices have integrated 22-mΩ and 11-mΩ integrated MOSFETs enable high efficiency up to 8-A output current. D-CAP3 control mode provides fast transient response without external compensation components and an accurate feedback voltage. The D-CAP3 control mode topology also provides seamless transition between CCM operating mode at higher load condition and DCM operation at lighter load condition. DCM allows the TPS51383 and TPS51384 to maintain high efficiency at light loads, and Out Of Audio (OOA) function maintains a minimum of 25-kHz switching frequency that is above audible range (20 Hz – 20 kHz). D-CAP3 control mode allow the use of low equivalent series resistance (ESR) output capacitors such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.

The TPS51383 and TPS51384 have 5-V internal VCC LDO that creates bias for all internal circuitry. The undervoltage lockout (UVLO) circuit monitors the VCC pin voltage to protect the internal circuitry from low input voltages. Both devices have an internal pulldown current source on the EN pin, require external pullup circuit to enable buck converter. Both devices feature MODE pin dynamic change, which allows the device to change state between OOA Mode and PSM Mode dynamically by toggling MODE pin high or low. TPS51383 and TPS51384 have fixed 600-kHz switching frequency and fixed 1-ms soft start.

TPS51383 features 3.36-V fixed output and a build in 3.3-V, 100-mA LDO. TPS51384 features 1.82-V fixed output and a build in 1.8-V, 100-mA LDO. The LDO is designed for powering external circuits that require constant power even when switching regulator is off (Vin > UVLO, EN = LOW). When the buck converter is ready, PGood is pulled high, and the buck output replaces the LDO output.