SLVSFY0A
August 2021 – May 2026
TPS51488
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
PWM Operation and D-CAP3™ Control Mode
6.3.2
Advanced Eco-mode Control
6.3.3
Soft Start and Prebiased Soft Start
6.3.4
Power Good
6.3.5
Overcurrent Protection and Undervoltage Protection
6.3.6
Overvoltage Protection
6.3.7
UVLO Protection
6.3.8
Output Voltage Discharge
6.3.9
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Light Load Operation for VDD1 Buck and VDD2 Buck
6.4.2
Output State Control
6.4.3
Output Sequence Control
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
External Component Selection
7.2.2.1.1
Inductor Selection
7.2.2.1.2
Output Capacitor Selection
7.2.2.1.3
Input Capacitor Selection
7.2.2.1.4
Bootstrap Capacitor and Resistor Selection
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Third-Party Products Disclaimer
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
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Data Sheet
TPS51488 Complete LPDDR5 Memory Power Design