TPS51488
- Synchronous buck converter (VDD2)
- Input voltage range: 4.5V to 24V
- Output voltage fixed at 1.065V
- D-CAP3™ control mode for fast transient response
- Continual output current: 8A
- Eco-mode for advanced pulse skipping
- Integrated 22mΩ / 8.6mΩ RDS(on) internal power switch
- 600kHz switching frequency
- Internal soft start: 1.6ms
- Cycle-by-cycle overcurrent protection
- Latched output OV/UV protections
- Synchronous buck converter (VDD1)
- Input voltage range: 3V to 5.5V
- Output voltage fixed at 1.8V
- D-CAP3 control mode for fast transient response
- Continual output current: 1A
- Eco-mode for advanced pulse skipping
- Integrated 150mΩ /120mΩ RDS(on) internal power switch
- 580kHz switching frequency
- Internal soft start: 1ms
- Cycle-by-cycle overcurrent protection
- Latched output OV/UV protections
- Built-in 500mV, 1.5A LDO (VDDQ)
- Output voltage fixed at 500mV
- 1.5A continual output current
- Requires only 10µF of ceramic output capacitor
- Support high-Z in S3
- Low quiescent current: 150µA
- Power-good indicator
- Output discharge function
- Power up and power down sequencing control
- Non-latch for OT and UVLO protections
- 18-pin 3.0mm × 3.0mm HotRod™ VQFN package
The TPS51488 provides a complete power design for LPDDR5 memory systems with the lowest total cost and design size. The device meets the JEDEC standard for LPDDR5 power-up and power-down sequence requirement. The TPS51488 integrates two synchronous buck converters (VDD1 and VDD2) and a 1.5A LDO (VDDQ).
The TPS51488 employs D-CAP3 control mode with 600kHz switching frequency for fast transient response, good load/line regulation, and support for ceramic output capacitors with no external compensation circuit.
The TPS51488 is highly configurable and has high efficiency due to the integrated low Rdson power MOSFETs. The device supports flexible power state control, placing VDDQ at high-Z in S3 and discharging VDD1, VDD2, and VDDQ in S4/S5 state. Full protection features include OVP, UVP, OCP, UVLO, and thermal shutdown protection. The device is available in a thermally enhanced 18-pin HotRod VQFN package, and the junction temperature is specified from –40°C to 125°C.
技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | TPS51488 Complete LPDDR5 Memory Power Design データシート (Rev. A) | PDF | HTML | 2026年 5月 19日 |