SLUSB94A OCTOBER   2012  – September 2016 TPS51716

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VDDQ Switch Mode Power Supply Control
      2. 7.3.2  VREF and REFIN, VDDQ Output Voltage
      3. 7.3.3  Soft-Start and Powergood
      4. 7.3.4  Power State Control
      5. 7.3.5  VDDQ Overvoltage and Undervoltage Protection
      6. 7.3.6  VDDQ Out-of-Bound Operation
      7. 7.3.7  VDDQ Overcurrent Protection
      8. 7.3.8  VTT and VTTREF
      9. 7.3.9  VTT Overcurrent Protection
      10. 7.3.10 V5IN Undervoltage Lockout (UVLO) Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin Configuration
      2. 7.4.2 Discharge Control
      3. 7.4.3 D-CAP2 Mode Operation
      4. 7.4.4 Light-Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Components Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Receiving Notification of Documentation Updates
      2. 11.2.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage(2) VBST –0.3 36 V
VBST(3) –0.3 6
SW –5 30
VLDOIN, VDDQSNS, REFIN –0.3 3.6
VTTSNS –0.3 3.6
PGND, VTTGND –0.3 0.3
V5IN, S3, S5, TRIP, MODE –0.3 6
Output voltage(2) DRVH –5 36 V
DRVH(3) –0.3 6
VTTREF, VREF –0.3 3.6
VTT –0.3 3.6
DRVL –0.3 6
PGOOD –0.3 6
Junction temperature, TJ 125 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the network ground terminal unless otherwise noted.
(3) Voltage values are with respect to the SW terminal.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
Supply voltage V5IN 4.5 5.5 V
Input voltage range VBST –0.1 33.5 V
VBST(2) –0.1 5.5
SW –3 28
SW(1) –4.5 28
VLDOIN, VDDQSNS, REFIN –0.1 3.5
VTTSNS –0.1 3.5
PGND, VTTGND –0.1 0.1
S3, S5, TRIP, MODE –0.1 5.5
Output voltage range DRVH –3 33.5 V
DRVH(2) –0.1 5.5
DRVH(1) –4.5 33.5
VTTREF, VREF –0.1 3.5
VTT –0.1 3.5
DRVL –0.1 5.5
PGOOD –0.1 5.5
TA Operating free-air temperature –40 85 °C
(1) This voltage should be applied for less than 30% of the repetitive period.
(2) Voltage values are with respect to the SW terminal.

6.4 Thermal Information

THERMAL METRIC(1) TPS51716 UNIT
RUK (WQFN)
20 PINS
RθJA Junction-to-ambient thermal resistance 94.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 58.1 °C/W
RθJB Junction-to-board thermal resistance 64.3 °C/W
ψJT Junction-to-top characterization parameter 31.8 °C/W
ψJB Junction-to-board characterization parameter 58.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 5.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over operating free-air temperature range, VV5IN = 5 V, VLDOIN is connected to VDDQ output, VMODE= 0 V, VS3= VS5= 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
IV5IN(S0) V5IN supply current, in S0 TA = 25°C, No load, VS3 = VS5 = 5 V 590 μA
IV5IN(S3) V5IN supply current, in S3 TA = 25°C, No load, VS3 = 0 V, VS5 = 5 V 500 μA
IV5INSDN V5IN shutdown current TA = 25°C, No load, VS3 = VS5 = 0 V 1 μA
IVLDOIN(S0) VLDOIN supply current, in S0 TA = 25°C, No load, VS3 = VS5 = 5 V 5 μA
IVLDOIN(S3) VLDOIN supply current, in S3 TA = 25°C, No load, VS3 = 0 V, VS5 = 5 V 5 μA
IVLDOINSDN VLDOIN shutdown current TA = 25°C, No load, VS3 = VS5 = 0 V 5 μA
VREF OUTPUT
VVREF Output voltage IVREF = 30 μA, TA = 25°C 1.8000 V
0 μA ≤ IVREF <300 μA, TA = –10°C to 85°C 1.7856 1.8144
0 μA ≤ IVREF <300 μA, TA = –40°C to 85°C 1.7820 1.8180
IVREFOCL Current limit VVREF = 1.7 V 0.4 0.8 mA
VTTREF OUTPUT
VVTTREF Output voltage VVDDQSNS / 2 V
VVTTREF Output voltage tolerance to VVDDQ |IVTTREF| <100 μA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V 49.2% 50.8%
|IVTTREF| <10 mA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V 49% 51%
IVTTREFOCLSRC Source current limit VVDDQSNS = 1.8 V, VVTTREF= 0 V 10 18 mA
IVTTREFOCLSNK Sink current limit VVDDQSNS = 1.8 V, VVTTREF = 1.8 V 10 17 mA
IVTTREFDIS VTTREF discharge current TA = 25°C, VS3 = VS5 = 0 V, VVTTREF = 0.5 V 0.8 1.3 mA
VTT OUTPUT
VVTT Output voltage VVTTREF V
VVTTTOL Output voltage tolerance to VTTREF |IVTT| ≤ 10 mA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V,
IVTTREF= 0 A		 –20 20 mV
|IVTT| ≤ 1 A, 1.2 ≤ VVDDQSNS ≤ 1.8 V,
IVTTREF= 0 A		 –30 30
|IVTT| ≤ 2 A, 1.4 V ≤ VVDDQSNS ≤ 1.8 V,
IVTTREF= 0 A		 –40 40
|IVTT| ≤ 1.5 A, 1.2 V ≤ VVDDQSNS ≤ 1.4 V,
IVTTREF= 0 A		 –40 40
IVTTOCLSRC Source current limit VVDDQSNS = 1.8 V, VVTT = VVTTSNS = 0.7 V,
IVTTREF= 0 A		 2 3 A
IVTTOCLSNK Sink current limit VVDDQSNS = 1.8V, VVTT = VVTTSNS = 1.1 V,
IVTTREF= 0 A		 2 3 A
IVTTLK Leakage current TA = 25°C , VS3 = 0 V, VS5 = 5 V, VVTT = VVTTREF 5 μA
IVTTSNSBIAS VTTSNS input bias current VS3 = 5 V, VS5 = 5 V, VVTTSNS = VVTTREF –0.5 0.0 0.5 μA
IVTTSNSLK VTTSNS leakage current VS3 = 0 V, VS5 = 5 V, VVTTSNS = VVTTREF –1 0 1 μA
IVTTDIS VTT Discharge current TA = 25°C, VS3 = VS5 = 0 V, VVDDQSNS = 1.8 V,
VVTT = 0.5 V, IVTTREF= 0 A		 7.8 mA
VDDQ OUTPUT
VVDDQSNS VDDQ sense voltage VREFIN
IVDDQSNS VDDQSNS input current VVDDQSNS = 1.8 V 39 μA
IREFIN REFIN input current VREFIN = 1.8 V –0.1 0.0 0.1 μA
IVDDQDIS VDDQ discharge current VS3 = VS5 = 0 V, VVDDQSNS = 0.5 V, non-tracking discharge mode 12 mA
IVLDOINDIS VLDOIN discharge current VS3 = VS5 = 0 V, VVDDQSNS = 0.5 V, tracking discharge mode 1.2 A
SWITCH MODE POWER SUPPLY (SMPS) FREQUENCY
fSW VDDQ switching frequency VIN = 12 V, VVDDQSNS = 1.8 V, RMODE = 1 kΩ 500 kHz
VIN = 12 V, VVDDQSNS = 1.8 V, RMODE = 12 kΩ 670
tON(min) Minimum on time DRVH rising to falling(1) 60 ns
tOFF(min) Minimum off time DRVH falling to rising 200 320 450 ns
VDDQ MOSFET DRIVER
RDRVH DRVH resistance Source, IDRVH = –50 mA 1.6 3 Ω
Sink, IDRVH = 50 mA 0.6 1.5
RDRVL DRVL resistance Source, IDRVL = –50 mA 0.9 2 Ω
Sink, IDRVL = 50 mA 0.5 1.2
tDEAD Dead time DRVH-off to DRVL-on 10 ns
DRVL-off to DRVH-on 20
INTERNAL BOOT STRAP SW
VFBST Forward voltage VV5IN-VBST, TA = 25°C, IF = 10 mA 0.1 0.2 V
IVBSTLK VBST leakage current TA = 25°C, VVBST = 33 V, VSW = 28 V 0.01 1.5 μA
LOGIC THRESHOLD
IMODE MODE source current 14 15 16 μA
VTHMODE MODE threshold voltage MODE 0-1 109 129 149 mV
MODE 1-2 235 255 275
MODE 2-3 392 412 432
VIL S3/S5 low-level voltage 0.5 V
VIH S3/S5 high-level voltage 1.8 V
VIHYST S3/S5 hysteresis voltage 0.25 V
IILK S3/S5 input leak current –1 0 1 μA
SOFT START
tSS VDDQ soft-start time Internal soft-start time, CVREF = 0.1 μF,
S5 rising to VVDDQSNS > 0.99 × VREFIN		 1.1 ms
PGOOD COMPARATOR
VTHPG VDDQ PGOOD threshold PGOOD in from higher 106% 108% 110%
PGOOD in from lower 90% 92% 94%
PGOOD out to higher 114% 116% 118%
PGOOD out to lower 82% 84% 86%
IPG PGOOD sink current VPGOOD = 0.5 V 3 5.9 mA
tPGDLY PGOOD delay time Delay for PGOOD in 0.8 1 1.2 ms
Delay for PGOOD out, with 100 mV over drive 330 ns
tPGSSDLY PGOOD start-up delay CVREF = 0.1 μF, S5 rising to PGOOD rising 2.5 ms
PROTECTIONS
ITRIP TRIP source current TA = 25°C, VTRIP = 0.4 V 9 10 11 μA
TCITRIP TRIP source current temperature coefficient(1) 4700 ppm/°C
VTRIP VTRIP voltage range 0.2 3 V
VOCL Current limit threshold VTRIP = 3.0 V 360 375 390 mV
VTRIP = 1.6 V 190 200 210
VTRIP = 0.2 V 20 25 30
VOCLN Negative current limit threshold VTRIP = 3.0 V –390 –375 –360 mV
VTRIP = 1.6 V –210 –200 –190
VTRIP = 0.2 V –30 –25 –20
VZC Zero cross detection offset 0 mV
VUVLO V5IN UVLO threshold voltage Wake-up 4.2 4.4 4.5 V
Shutdown 3.7 3.9 4.1
VOVP VDDQ OVP threshold voltage OVP detect voltage 118% 120% 122%
tOVPDLY VDDQ OVP propagation delay With 100 mV over drive 430 ns
VUVP VDDQ UVP threshold voltage UVP detect voltage 66% 68% 70%
tUVPDLY VDDQ UVP delay 1 ms
tUVPENDLY VDDQ UVP enable delay 1.2 ms
VOOB OOB Threshold voltage 108%
THERMAL SHUTDOWN
TSDN Thermal shutdown threshold Shutdown temperature(1) 140 °C
Hysteresis(1) 10
(1) Specified by design. Not production tested.

6.6 Typical Characteristics

TPS51716 v5in_tj_lusab9.png
Figure 1. V5IN Supply Current vs Junction Temperature
TPS51716 vldoin_tj_lusab9.png
Figure 3. VLDOIN Supply Current vs Junction Temperature
TPS51716 uvpovp_tj_lusab9.png
Figure 5. OVP/UVP Threshold vs Junction Temperature
TPS51716 vtt_tj_lusab9.png
Figure 7. VTT Discharge Current vs Junction Temperature
TPS51716 fsw_vin4_lusae1.png
Figure 9. Switching Frequency vs Input Voltage
TPS51716 fsw_ivddq4_lusb94.png
Figure 11. Switching Frequency vs Load Current
TPS51716 linereg_lusb94.png
Figure 13. Line Regulation
TPS51716 vttrefload135_lusab9.png
Figure 15. VTTREF Load Regulation
TPS51716 vttload15_lusae1.png
Figure 17. VTT Load Regulation
TPS51716 vttload12_lusae1.png
Figure 19. VTT Load Regulation
TPS51716 eff_12_lusb94.png
Figure 21. Efficiency
TPS51716 v5insd_tj_lusab9.png
Figure 2. V5IN Shutdown Current vs Junction Temperature
TPS51716 trip_tj_lusab9.png
Figure 4. Current Sense Current vs Junction Temperature
TPS51716 vddqsns_tj_lusab9.png
Figure 6. VDDQSNS Discharge Current vs Junction Temperature
TPS51716 fsw_vin3_lusae1.png
Figure 8. Switching Frequency vs Input Voltage
TPS51716 fsw_ivddq3_lusae1.png
Figure 10. Switching Frequency vs Load Current
TPS51716 loadreg_lusb94.png
Figure 12. Load Regulation
TPS51716 vttregload15_lusab9.png
Figure 14. VTTREF Load Regulation
TPS51716 vttrefload12_lusab9.png
Figure 16. VTTREF Load Regulation
TPS51716 vttload135_lusae1.png
Figure 18. VTT Load Regulation
TPS51716 eff_15_lusb94.png
Figure 20. Efficiency