JAJSP58 September 2022 TPS544C26
ADVANCE INFORMATION
In most cases the effect of an I2C write to a register is immediate: Once the write is performed, the value becomes available for use in the system. There are a few exceptions with special handling for preserving the integrity of the system.
A write to the following list of registers is prevented and the system response is to NACK writes to these registers when the SW switching is enabled. For example, before importing the user specific configuration, disabling the SW switching is required to successfully import a new value to these registers.
When ON_OFF_CONFIG is set to Always On, the values from the NVM restore for these registers will be NACKed and will never become effective. Even the NVM restore during power-on initialization is affected by this kind of configuration.
When a write to one of these registers is accepted (ACKed), one or more bit-fields in this register are allowed to take effect immediately only if the SW switching is disabled. If the SW switching is enabled, the previous value for those bit-fields continues to be used by the system, and the new value for those bit-fields is kept ready inside the IC but only become effective the next time when the SW switching is disabled. A readback attempt will be accepted (ACKed) and return the most recent ACKed value.
When ON_OFF_CONFIG is set to Always On, the values from the NVM restore can be kept in the staging area and never become effective. Even the NVM restore during power-on initialization is affected by this kind of configuration.
When a write to one of these register is accepted (ACKed), one or more bit-fields in the register are not allowed to take effect at all. The new value takes effect only if the value is stored into NVM first and then retrieved from NVM after the device is powered on.
The sequence of events, for the contents of those fields to take effect is as follows: