JAJS536I October   2002  – December 2016 TPS61040 , TPS61041

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Peak Current Control
      2. 7.3.2 Soft Start
      3. 7.3.3 Enable
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection, Maximum Load Current
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Line and Load Regulation
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Diode Selection
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 関連リンク
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DBV|5
  • DRV|6
サーマルパッド・メカニカル・データ
発注情報

Layout

Layout Guidelines

Typical for all switching power supplies, the layout is an important step in the design; especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems and duty cycle jitter.

The input capacitor should be placed as close as possible to the input pin for good input voltage filtering. The inductor and diode should be placed as close as possible to the switch pin to minimize the noise coupling into other circuits. Because the feedback pin and network is a high-impedance circuit, the feedback network should be routed away from the inductor. The feedback pin and feedback network should be shielded with a ground plane or trace to minimize noise coupling into this circuit.

Wide traces should be used for connections in bold as shown in Figure 23. A star ground connection or ground plane minimizes ground shifts and noise.

Layout Example

TPS61040 TPS61041 TPS61040_Layout_Example_slvs413.gif Figure 23. Layout Diagram