SNVSA76B March   2015  – March 2017 TPS61177A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Supply Voltage
      2. 7.3.2  Boost Regulator
      3. 7.3.3  Programmable Switch Frequency and Slew Rate
      4. 7.3.4  LED Current Sinks
      5. 7.3.5  Enable and Start-Up Timing
      6. 7.3.6  Input Undervoltage Protection (UVLO)
      7. 7.3.7  Overvoltage Protection (OVP)
      8. 7.3.8  Current-Sink Open Protection
      9. 7.3.9  Overcurrent Protection
      10. 7.3.10 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Mode Selection
      2. 7.4.2 Analog and PWM Mixed Dimming Mode
      3. 7.4.3 Analog Dimming Mode
      4. 7.4.4 Direct PWM Dimming
    5. 7.5 Programming
      1. 7.5.1 Configuration Parameters
    6. 7.6 Register Maps
      1. 7.6.1  MODE (A0h)
      2. 7.6.2  CS (A1h)
      3. 7.6.3  UVLO (A2h)
      4. 7.6.4  FREQ (A3h)
      5. 7.6.5  SR (A4h)
      6. 7.6.6  ILIM (A5h)
      7. 7.6.7  Control (FFh)
      8. 7.6.8  Example - Writing to a Single RAM Register
      9. 7.6.9  Example - Writing to Multiple RAM Registers
      10. 7.6.10 Example - Saving Contents of all RAM Registers to E2PROM
      11. 7.6.11 Example - Reading from a Single RAM Register
      12. 7.6.12 Example - Reading from a Single E2PROM Register
      13. 7.6.13 Example - Reading from Multiple RAM Registers
      14. 7.6.14 Example - Reading from Multiple E2PROM Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 CS Pin Unused
      2. 8.1.2 Brightness Dimming Control
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor, C1 in the Typical Application, must not only to be close to the VIN pin, but also to the GND pin in order to reduce the input ripple seen by the device. The input capacitor, C4 in the Typical Application, must also be placed close to the inductor. C5 is the reference capacitor for the internal integration circuit. It must be placed as close between the REF and AGND pins as possible to prevent any noise insertion to the digital circuits. The LX pin carries high current with fast rising and falling edges. Therefore, the connection between the pin to the inductor and Schottky diode must be kept as short and wide as possible. It is also beneficial to have the ground of the output capacitor C2 close to the PGND pin because there is a large ground return current flowing between them. When laying out signal grounds, TI recommends using short traces separated from power ground traces, and connecting them together at a single point, for example on the DAP. The DAP must be soldered on to the PCB and connected to the GND pin of the device. An additional thermal via can significantly improve power dissipation of the device.

10.2 Layout Example

TPS61177A layout_SNVSA76.gif