JAJSHJ3D June   2019  – March 2020 TPS62840

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション
      2.      効率と負荷電流の関係 (VOUT = 1.8V)
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Smart Enable and Shutdown
      2. 8.3.2 Soft Start
      3. 8.3.3 Mode Selection: Power-Save Mode (PFM/PWM) or Forced PWM Operation (FPWM)
      4. 8.3.4 Output Voltage Selection (VSET)
      5. 8.3.5 Undervoltage Lockout UVLO
      6. 8.3.6 Switch Current Limit / Short Circuit Protection
      7. 8.3.7 Output Voltage Discharge
      8. 8.3.8 Thermal Shutdown
      9. 8.3.9 STOP Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Save Mode Operation
      2. 8.4.2 Forced PWM Mode Operation
      3. 8.4.3 100% Mode Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 System Example
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 サポート・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11.1 Layout Guidelines

The TPS62840 pinout has been optimized to enable a single layer PCB routing of the device and its critical passive components such as CIN, COUT, and L.

  • As for all switching power supplies, the layout is an important step in the design. Care must be taken in board layout to get the specified performance.
  • It is critical to provide a low inductance, low impedance ground path. Therefore, use wide and short traces for the main current paths.
  • The input capacitor must be placed as close as possible to the VIN and GND pins of the device. This is the most critical component placement.
  • The VOS line is a sensitive, high impedance line and must be connected to the output capacitor and routed away from noisy components and traces (for example, the SW line) or other noise sources.