JAJSJ23F September   2019  – October 2023 TPS62860 , TPS62861

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Characteristics
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power Save Mode
      2. 8.3.2  Forced PWM Operation
      3. 8.3.3  Smart Enable and Shutdown (EN)
      4. 8.3.4  Soft Start
      5. 8.3.5  Output Voltage Selection (VSEL) for TPS62860x
      6. 8.3.6  Output Voltage Selection (VSEL and I2C)
      7. 8.3.7  Forced PWM Mode During Output Voltage Change
      8. 8.3.8  Undervoltage Lockout (UVLO)
      9. 8.3.9  Power Good (PG)
      10. 8.3.10 Switch Current Limit and Short Circuit Protection
      11. 8.3.11 Thermal Shutdown
      12. 8.3.12 Output Voltage Discharge
    4. 8.4 Programming
      1. 8.4.1 Serial Interface Description
      2. 8.4.2 Standard- and Fast-Mode Protocol
      3. 8.4.3 I2C Update Sequence
      4. 8.4.4 I2C Register Reset
    5. 8.5 Register Map
      1. 8.5.1 Slave Address Byte
      2. 8.5.2 Register Address Byte
      3. 8.5.3 VOUT Register 1
      4. 8.5.4 VOUT Register 2
      5. 8.5.5 CONTROL Register
      6. 8.5.6 STATUS Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application, TPS628610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application, TPS628600, TPS62860x
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.5.1 Layout Guidelines

The pinout of the TPS6286x converter has been optimized to enable a single top layer PCB routing of the converter and its critical passive components such as CIN, COUT, and L. This pinout allows the connection of tiny components such as 0201 (0603) size capacitors and 0402 (1005) size inductor. A design size smaller than 5 mm2 can be achieved with a fixed output voltage.

  • As for all switching power supplies, the layout is an important step in the design. A specified performance requires the correct on board layout.
  • Provide a low inductance, low impedance ground path. Therefore, use wide and short traces for the main current paths.
  • Place the input capacitor as close as possible to the VIN and GND pins of the converter. This is the most critical component placement.
  • The VOS line is a sensitive, high impedance line and must be connected to the output capacitor and routed away from noisy components and traces (for example, SW line) or other noise sources.