JAJSNI5A december   2022  – august 2023 TPS631010 , TPS631011

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Rating
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics 
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Enable and Soft Start
      3. 8.3.3 Adjustable Output Voltage
      4. 8.3.4 Mode Selection (PFM/FPWM)
      5. 8.3.5 Output Discharge
      6. 8.3.6 Reverse Current Operation
      7. 8.3.7 Protection Features
        1. 8.3.7.1 Input Overvoltage Protection
        2. 8.3.7.2 Output Overvoltage Protection
        3. 8.3.7.3 Short Circuit Protection
        4. 8.3.7.4 Thermal Shutdown
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Setting the Output Voltage
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design with WEBENCH Tools
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Setting the Output Voltage

The output voltage is set by an external resistor divider. The resistor divider must be connected between VOUT, FB, and GND. The feedback voltage is 500 mV nominal.

Keep the low-side resistor R2 (between FB and GND) below 100 kΩ. The high-side resistor (between FB and VOUT) R1 is calculated with Equation 4.

Equation 4. GUID-28DAE68A-983E-408D-90F8-D32A516CBB87-low.gif

where

  • VFB = 500 mV
Table 9-5 Resistor Selection For Typical Output Voltages
VOUTR1R2
2.5 V365K91K
3.3 V511K91K
3.6 V562K91K
5 V806K91K