SBVS100E June   2008  – September 2015 TPS720

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Inrush Current Limit
      3. 7.3.3 Shutdown
      4. 7.3.4 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Requirements
      2. 8.1.2 Output Regulation With IN Pin Floating
      3. 8.1.3 Dropout Voltage
      4. 8.1.4 Transient Response
      5. 8.1.5 Minimum Load
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedures
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Mounting

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

7.3.2 Inrush Current Limit

The TPS720 family of LDO regulators implement a novel inrush current limit circuit architecture: the current drawn through the IN pin is limited to a finite value. This IINRUSHLIMIT charges the output to its final voltage. All the current drawn through VIN goes to charge the output capacitance when the load is disconnected. The following equation shows the inrush current limit performed by the circuit:

Equation 1. IINRUSHLIMIT(A) = COUT(μF) × 0.0454545 (V/μs) + ILOAD(A)

Assuming a COUT of 2.2 μF with the load disconnected (that is, ILOAD = 0) the IINRUSHLIMIT is calculated to be 100 mA. The inrush current charges the LDO output capacitor. If the output of the LDO regulates to 1.3 V, then the LDO charges the output capacitor to the final output value in approximately 28.6 μs.

Another consideration is when a load is connected to the output of an LDO. The connected load tries to steer a portion of the current away from VOUT. The TPS720 inrush current limit circuit employs a new technique that supplies not only the IINRUSHLIMIT, but also the additional current needed by the load. If ILOAD = 350 mA, then the IINRUSHLIMIT calculates to be approximately 450 mA (from Equation 1).