SLVSAJ4C Data sheet

SLVSAJ4C September 2010 – October 2017

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

DBV|5
- MPDS018S

サーマルパッド・メカニカル・データ

発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

	MIN	MAX	UNIT
Input voltage range, V_IN	–11	0.3	V
Noise reduction pin voltage range, V_NR	–11	5.5	V
Enable voltage range, V_EN	–V_IN	5.5	V
Output current, I_OUT	Internally limited
Output short-circuit duration	Indefinite
Continuous total power dissipation, P_D	See the Power Dissipation Ratings table
Latch-up performance meets 100 mA per AEC-Q100 \| Class I	100		mA
Junction temperature range, T_J	–55	150	°C
Storage temperature, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾	±2000	V
		Charged-device model (CDM), per AEC Q100-011	±500
		Machine model	±200

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Power Dissipation Ratings

BOARD	PACKAGE	R_θJC	R_θJA	DERATING FACTOR ABOVE T_A = 25°C	T_A ≤ 25°C POWER RATING	T_A = 70°C POWER RATING	T_A = 85°C POWER RATING
Low-K⁽¹⁾	DBV	64°C/W	255°C/W	3.9 mW/°C	390 mW	215 mW	155 mW
High-K⁽²⁾	DBV	64°C/W	180°C/W	5.6 mW/°C	560 mW	310 mW	225 mW

(1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch × 3- inch (7,62-cm × 7,62-cm), two-layer board with 2-ounce (0.071-mm thick) copper traces on top of the board.

(2) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch × 3 inch (7,62-cm × 7,62-cm), multilayer board with 1-ounce (0.035-mm thick) internal power and ground planes and 2-ounce (0.071-mm thick) copper traces on the top and bottom of the board.

6.4 Electrical Characteristics

Over operating junction temperature range, V_IN = V_OUTnom – 0.5V, I_OUT = 1mA, V_EN = 1.5V, C_OUT = 2.2μF, and C_NR = 0.01μF, unless otherwise noted. Typical values are at T_J = 25°C.

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_IN	Input voltage range⁽¹⁾			–10		–2.7	V
V_OUT	Accuracy	Nominal	T_J = 25°C	–1%		1%
V_OUT	Accuracy	TPS723xx-Q1 versus V_IN / I_OUT / T	–10V ≤ V_IN ≤ V_OUT – 0.5V, 10 μA ≤ I_OUT ≤ 200 mA	–2%	±1%	2%
V_OUT% / V_IN	Line regulation		–10 V ≤ V_IN ≤ V_OUT(nom) – 0.5 V		0.04		%/V
V_OUT% / I_OUT	Load regulation		0 mA ≤ I_OUT ≤ 200 mA		0.002		%/mA
V_DO	Dropout voltage at V_OUT = 0.96 × V_OUTnom		I_OUT = 200 mA		280	500	mV
I_CL	Current limit		V_OUT = 0.85 × V_OUT(nom)	300	550	800	mA
I_GND	Ground pin current		I_OUT = 0 mA (I_Q), –10 V ≤ V_IN ≤ V_OUT – 0.5 V		130	200	μA
I_GND	Ground pin current		I_OUT = 200 mA, –10 V ≤ V_IN ≤ V_OUT – 0.5 V		350	500	μA
I_SHDN	Shutdown ground pin current		–0.4 V ≤ V_EN ≤ 0.4 V, –10V ≤ V_IN ≤ V_OUT – 0.5 V		0.1	2	μA
PSRR	Power-supply rejection ratio		I_OUT = 200 mA, 1 kHz, C_IN = C_OUT = 10 μF		65		dB
PSRR	Power-supply rejection ratio		I_OUT = 200 mA, 10 kHz, C_IN = C_OUT = 10 μF		48		dB
V_n	Output noise voltage		C_OUT = 10 μF, 10 Hz to 100 kHz, I_OUT = 200 mA		60		μV_RMS
t_STR	Startup time		V_OUT = –2.5 V, C_OUT = 1 μF, R_L = 25 Ω		1		ms
V_EN(HI)	Enable threshold positive			1.5			V
V_EN(LO)	Enable threshold negative					–1.5	V
V_DIS(HI)	Disable threshold positive					0.4	V
V_DIS(LO)	Disable threshold negative			–0.4			V
I_EN	Enable pin current		–10 V ≤ V_IN ≤ V_OUT – 0.5 V, –10 V ≤ V_EN ≤ ±3.5 V		0.1	2	μA
T_SD	Thermal shutdown temperature		Shutdown, temperature increasing		165		°C
T_SD	Thermal shutdown temperature		Reset, temperature decreasing		145		°C
T_J	Operating junction temperature			–40		125	°C