SLVS346D September   2003  – December 2019 TPS723

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Circuit
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit
      2. 7.3.2 Enable
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Capacitor Selection for Stability
        2. 8.2.1.2 Output Noise
        3. 8.2.1.3 Power-Supply Rejection
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Dissipation
      2. 10.1.2 Thermal Protection
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

5 Pin Configuration and Functions

DBV Package
5-Pin SOT23
Top View
TPS723 po_lvs346.gif
DDC Package
5-Pin SOT23
Top View
TPS723 po_lvs346.gif
DRV Package
6-Pin WSON
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
DBV, DDC DRV
GND 1 5 — Ground
IN 2 6 I Input supply
EN 3 4 I Bipolar enable pin. Driving this pin above the positive enable threshold or below the negative enable threshold turns on the regulator. Driving this pin below the positive disable threshold and above the negative disable threshold puts the regulator into shutdown mode.
NR 4 2 — Fixed voltage versions only. Connecting an external capacitor between this pin and ground, bypasses noise generated by the internal band gap. This configuration allows output noise to be reduced to very low levels.
FB 4 2 I Adjustable voltage version only. This pin is the input to the control loop error amplifier. This pin is used to set the output voltage of the device.
OUT 5 1 O Regulated output voltage. A small, 2.2-μF ceramic capacitor is needed from this pin to GND to ensure stability.
N/C — 3 No internal connection