JAJSMG4A June   2023  – September 2023 TPS922052 , TPS922053 , TPS922054 , TPS922055

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Adaptive Off-Time Current Mode Control
        1. 8.3.1.1 Switching Frequency Settings
        2. 8.3.1.2 Spread Spectrum
      2. 8.3.2 Setting LED Current
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Internal Soft Start
      5. 8.3.5 Dimming Mode
        1. 8.3.5.1 PWM Dimming
        2. 8.3.5.2 Analog Dimming
        3. 8.3.5.3 Hybrid Dimming
        4. 8.3.5.4 Flexible Dimming
      6. 8.3.6 CC/CV Charging Mode
      7. 8.3.7 Fault Protection
      8. 8.3.8 Thermal Foldback
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 TPS922054 24-V Input, 4-A Output, 4-piece WLED Driver With Analog Dimming
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Input Capacitor Selection
          3. 9.2.1.2.3 Output Capacitor Selection
          4. 9.2.1.2.4 Sense Resistor Selection
          5. 9.2.1.2.5 Other External Components Selection
        3. 9.2.1.3 Application Curves
      2. 9.2.2 TPS922054 48-V Input, 2-A Output, 12-piece WLED Driver with PWM Dimming
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Inductor Selection
          2. 9.2.2.2.2 Input Capacitor Selection
          3. 9.2.2.2.3 Output Capacitor Selection
          4. 9.2.2.2.4 Sense Resistor Selection
          5. 9.2.2.2.5 Other External Components Selection
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.1 Adaptive Off-Time Current Mode Control

The TPS92205x device adopts an adaptive off-time current mode control to support fast transient response over a wide range of operation. The switching frequency is configurable through FSET pin, ranging from 100 kHz to 2.2 MHz.

For average output current regulation, the sensed voltage across the sensing resistor between the CSP and CSN pins is compared with the internal voltage reference, VREF , through the error amplifier. The output of the error amplifier, VCOMP, passes through an external compensation network and is then compared with the peak current feedback at the PWM comparator. During each switching cycle, when the internal NMOS FET is turned on, the peak currernt is sensed through the internal FET. When the sensed value of peak current reaches VCOMP at the input of PWM comparator, the NMOS FET is turned off and the adaptive off-time counter starts counting. Once the adaptive off-time counter stops counting, the counter is reset until when the NMOS FET stays off. The counting off time is determined by the external resistor connected to the FSET pin and the input/output feedforward. Thus, the device is able to maintain a nearly constant switching frequnecy at steady state and regulate the output average current at a desired value.

GUID-18EE9699-0137-4BE2-81F3-4C4BF0B9F8A6-low.svg 図 8-1 Adaptive off-time current mode control method