JAJSNX2 January 2024 TPSM843820E
PRODUCTION DATA
When the external clock is present, the device synchronizes the switching frequency to the clock. Any time the external clock is not present, the device defaults to the internal PWM oscillator frequency.
If the device starts up before an external clock signal is applied, then the internal PWM oscillator frequency is set by the RFSEL resistor according to Table 6-1. The device switches at this frequency until the external clock is applied or anytime the external clock is not present.
If the external clock is applied before the device starts up, then the RFSEL resistor is not needed. The device determines the internal clock frequency by decoding the external clock frequency. Table 6-2 shows the decoding of the internal PWM oscillator frequency based on the external clock frequency.
EXTERNAL SYNC CLOCK FREQUENCY (kHz) | DECODED INTERNAL PWM OSCILLATOR FREQUENCY (kHz) |
---|---|
400 - 600 | 500 |
600 - 857 | 750 |
857 - 1200 | 1000 |
1200 - 1810 | 1500 |
1810 - 2640 | 2200 |
The thresholds for the external SYNC clock frequency ranges have approximately a ±5% tolerance. If the external clock frequency must be within that tolerance range, decoding the internal PWM oscillator frequency as either the frequency above or below that threshold is possible. Because the internal frequency is what is used in case of the loss of the synchronization clock, TI recommends that the output LC filter and ramp selection are chosen to be stable for either frequency. Table 6-3 shows the tolerance range of the decode thresholds. If the external clock is to be within any of these ranges, TI recommends to make sure converter stability for both possible internal PWM oscillator frequencies.
MINIMUM (kHz) | TYPICAL (kHz) | MAXIMUM (kHz) |
---|---|---|
570 | 600 | 630 |
814 | 857 | 900 |
1140 | 1200 | 1260 |
1736 | 1810 | 1884 |