JAJSEV7C March   2018  – September 2019 TUSB1064

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
      2.      TUSB1064 使用事例
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 ELECTRICAL CHARACTERISTICS
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 USB 3.1
      2. 8.3.2 DisplayPort
      3. 8.3.3 4-level Inputs
      4. 8.3.4 Receiver Linear Equalization
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Configuration in GPIO Mode
      2. 8.4.2 Device Configuration In I2C Mode
      3. 8.4.3 DisplayPort Mode
      4. 8.4.4 Linear EQ Configuration
      5. 8.4.5 USB3.1 Modes
      6. 8.4.6 Operation Timing – Power Up
    5. 8.5 Programming
    6. 8.6 Register Maps
      1. 8.6.1 General Register (address = 0x0A) [reset = 00000001]
        1. Table 11. General Registers
      2. 8.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
        1. Table 12. DisplayPort Control/Status Registers (0x10)
      3. 8.6.3 DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
        1. Table 13. DisplayPort Control/Status Registers (0x11)
      4. 8.6.4 DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
        1. Table 14. DisplayPort Control/Status Registers (0x12)
      5. 8.6.5 DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
        1. Table 15. DisplayPort Control/Status Registers (0x13)
      6. 8.6.6 USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
        1. Table 16. USB3.1 Control/Status Registers (0x20)
      7. 8.6.7 USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
        1. Table 17. USB3.1 Control/Status Registers (0x21)
      8. 8.6.8 USB3.1 Control/Status Registers (address = 0x22) [reset = 00000000]
        1. Table 18. USB3.1 Control/Status Registers (0x22)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Support for DisplayPort UFP_D Pin Assignment E
      4. 9.2.4 PCB Insertion Loss Curves
    3. 9.3 System Examples
      1. 9.3.1 USB 3.1 Only
      2. 9.3.2 USB 3.1 and 2 Lanes of DisplayPort
      3. 9.3.3 DisplayPort Only
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Support for DisplayPort UFP_D Pin Assignment E

The TUSB1064 device can be used in a system that handles DisplayPort UFP_D Pin Assignment E use-case if special measures are taken as described below. With UFP_D Pin Assignment E, the polarity of both the main link and AUX signals is inverted on the Type-C receptacle pins relative to Pin Assignment C. Moreover, on the Type-C receptacle, the location of Lane 0 is swapped with Lane 1 and that of Lane 2 is swapped with Lane 3 relative to Pin Assignment C. For correct reception of the DisplayPort video signal, the system has to comprehend the above-described signaling variation.

The use of the TUSB1064 device in a system that handles Pin Assignment E depends on whether AUX-to-SBU switching of the DisplayPort AUX signal is performed internally by the TUSB1064 or by external devices such as a PD controller. It also depends on the configuration mode used: I2C Mode or GPIO Mode. In all those scenarios the TUSB1064 passes the polarity of the Main Link signals as received. The DisplayPort sink has to handle the polarity inversion of those signals. Moreover, the DisplayPort sink has to handle the lane swapping with the following lane-to-pin mapping as received by the TUSB1064 device: Lane 0 → DP1, Lane 1 → DP0, Lane 2 → DP3, and Lane 3 → DP2.

The use-case with the AUX-to-SBU switching performed internally by the TUSB1064 device is shown in Figure 28. If the TUSB1064 device configuration is through the I2C Mode, AUX snooping has to be disabled by setting AUX_SNOOP_DISABLE register 0x13[7] = 1'b1, and manual AUX-to-SBU switching has to be performed through the AUX_SBU_OVR register 0x13[5:4]: AUX_SBU_OVR = 2’b01 for normal USB Type-C plug orientation, or AUX_SBU_OVR = 2’b10 for flipped USB Type-C plug orientation when Pin Assignment E signals are received. If the TUSB1064 device configuration is through the GPIO Mode, all 4 DisplayPort lanes are automatically activated. The DisplayPort sink device has to handle the polarity inversion of both the AUX and Main Link signals as well as main link lane swapping.

TUSB1064 TUSB1064_Pin_Assignment_E_AUX_Snoop_Internal_Switch.gifFigure 28. DisplayPort AUX Connections for UFP_D Pin Assignment E with Internal AUX Switching

The use-case with the AUX-to-SBU switching performed by an external device is shown in Figure 29. In this case, it is assumed that the PD controller is capable of correcting the polarity inversion of the AUX signal and the TUSB1064 is provided with the corrected polarity of the AUX signal through its AUXp/AUXn pins. If the TUSB1064 device configuration is through the I2C Mode, AUX snooping should be disabled by setting AUX_SNOOP_DISABLE register 0x13[7] = 1'b1. The DisplayPort sink device has to handle the polarity inversion of the Main Link signals as well as the Main Link lane swapping.

TUSB1064 TUSB1064_Pin_Assignment_E_AUX_Snoop_External_Switch.gifFigure 29. DisplayPort AUX Connections for UFP_D Pin Assignment E with External AUX Switching