JAJSGZ6E January   2009  – February 2019 UC1842A-SP , UC1844A-SP

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
  4. 改訂履歴
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Electrical Characteristics (Radiation-Improved Devices)
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 UVLO
      2. 8.3.2 Reference
      3. 8.3.3 Totem-Pole Output
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Oscillator
        2. 9.2.2.2 Current Sensing and Limiting
        3. 9.2.2.3 Error Amplifier
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Feedback Traces
      2. 11.1.2 Input/Output Capacitors
      3. 11.1.3 Compensation Components
      4. 11.1.4 Traces and Ground Planes
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 関連リンク
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Current Sensing and Limiting

The UC184xA-SP current sense input is configured as shown in Figure 18. Current-to-voltage conversion is done externally with ground-referenced resistor RS. Under normal operation, the peak voltage across RS is controlled by the E/A according to the following relation:

Equation 2. UC1842A-SP UC1844A-SP eq_02_LUSC14.gif

where

  • VC = Control voltage = E/A output voltage

RS can be connected to the power circuit directly or through a current transformer, as Figure 18 shows. While a direct connection is simpler, a transformer can reduce power dissipation in RS, reduce errors caused by the base current, and provide level shifting to eliminate the restraint of ground-referenced sensing. The relation between VC and peak current in the power stage is given by:

Equation 3. UC1842A-SP UC1844A-SP eq_03_LUSC14.gif

where

  • N = Current sense transformer turns ratio = 1 when transformer not used.

For purposes of small-signal analysis, the control-to-sensed-current gain is:

Equation 4. UC1842A-SP UC1844A-SP eq_04_LUSC14.gif

When sensing current in series with the power transistor, as shown in Figure 18, the current waveform often has a large spike at its leading edge. This spike is due to rectifier recovery and/or inter-winding capacitance in the power transformer. If unattenuated, this transient can prematurely terminate the output pulse. As shown, a simple RC filter is usually adequate to suppress this spike. The RC time constant should be approximately equal to the current spike duration (usually a few hundred nanoseconds).

The inverting input to the UC184xA-SP current-sense comparator is internally clamped to 1 V (Figure 18). Current limiting occurs if the voltage at pin 3 reaches this threshold value, that is, the current limit is defined by:

Equation 5. UC1842A-SP UC1844A-SP eq_05_LUSC14.gif
UC1842A-SP UC1844A-SP transf_coupled_LUSC14.gifFigure 18. Transformer-Coupled Current Sensing