JAJSR46 August   2023 UCC23113

PRODUCTION DATA  

1.   1
2. 1 特長
3. 2 アプリケーション
4. 3 概要
5. 4 Revision History
6. 5 Pin Configuration and Function
7. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 Power Ratings
   6. 6.6 Insulation Specifications
   7. 6.7 Electrical Characteristics
   8. 6.8 Switching Characteristics
   9. 6.9 Typical Characteristics
8. 7 Parameter Measurement Information
   1. 7.1 Propagation Delay, Rise Time and Fall Time
   2. 7.2 IOH and IOL testing
   3. 7.3 CMTI Testing
9. 8 Detailed Description
   1. 8.1 Overview
   2. 8.2 Functional Block Diagram
   3. 8.3 Feature Description
      1. 8.3.1 Power Supply
      2. 8.3.2 Input Stage
      3. 8.3.3 Output Stage
      4. 8.3.4 Protection Features
         1. 8.3.4.1 Undervoltage Lockout (UVLO)
         2. 8.3.4.2 Active Pulldown
         3. 8.3.4.3 Short-Circuit Clamping
   4. 8.4 Device Functional Modes
      1. 8.4.1 ESD Structure
10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
       1. 9.2.1 Design Requirements
       2. 9.2.2 Detailed Design Procedure
          1. 9.2.2.1 Selecting the Input Resistor
          2. 9.2.2.2 Gate Driver Output Resistor
          3. 9.2.2.3 Estimate Gate-Driver Power Loss
          4. 9.2.2.4 Estimating Junction Temperature
          5. 9.2.2.5 Selecting VDD Capacitor
11. 10Power Supply Recommendations
12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 PCB Material
13. 12Device and Documentation Support
    1. 12.1 Device Support
       1. 12.1.1 サード・パーティ製品に関する免責事項
       2. 12.1.2 Development Support
    2. 12.2 Documentation Support
       1. 12.2.1 Related Documentation
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 用語集
14. 13Mechanical, Packaging, and Orderable Information

UCC23113 5A、5A、フォトカプラ互換シングル・チャネル機能絶縁型ゲート・ドライバ、UVLO 搭載