JAJSTW2C January   2024  – March 2024 UCC33420-Q1

ADVANCE INFORMATION  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Insulation Specifications
    6. 5.6 Safety-Related Certifications
    7. 5.7 External BOM Components
    8. 5.8 Electrical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable and Disable
      2. 6.3.2 Output Voltage Soft-Start and Steady-State Regulation
      3. 6.3.3 Protection Features
        1. 6.3.3.1 Input Under-voltage and Over-Voltage Lockout
        2. 6.3.3.2 Output Under-Voltage Protection
        3. 6.3.3.3 Output Over-Voltage Protection
        4. 6.3.3.4 Over-Temperature Protection
        5. 6.3.3.5 Fault Reporting and Auto-Restart
      4. 6.3.4 VCC Output Voltage Selection
      5. 6.3.5 VCC Load Recommended Operating Area
      6. 6.3.6 Electromagnetic Compatibility (EMC) Considerations
    4. 6.4 Device Functional Modes
    5. 6.5 Pre-Production Samples Operating Limits
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical and Packaging Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
  • RAQ|12
サーマルパッド・メカニカル・データ
発注情報

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
PIN MIN TYP MAX UNIT
VVINP Primary-side input voltage to GNDP 4.5 5.5 V
VEN/FLT EN/FLT pin voltage to GNDP 0 5.5 V
VVCC Secondary-side Isolated output voltage to GNDS 0 5.7 V
VSEL SEL pin input voltage to GNDS 0 5.7 V
PVCC VCC output power at VINP=5.0V±10%, VCC = 5.0V, TA=25°C - 85°C  (1) 1.5 W
PVCC VCC output power at VINP=5.0V±10%, VCC = 5.0V, TA=105°C (1) 1 W
PVCC VCC output power at VINP=5.0V±10%, VCC = 5.0V, TA=125°C (1) 0.4 W
Static CMTI Static Common mode transient immunity rating (dV/dt rate across the isolation barrier) 200 V/ns
Dynamic CMTI Dynamic Common mode transient immunity rating (dV/dt rate across the isolation barrier) 200 V/ns
TA Ambient temperature –40 125
TJ Junction temperature –40 150
See the VCC Load Recommended Operating Area section for maximum rated values across temperature and VINP conditions for different VCC output voltage settings.