The UCC33420 has soft-start mechanism that ensures a smooth and fast soft-start operation with minimum input inrush current. The output voltage Soft-Start diagram is shown in Figure 6-1. After VINP > V_{VINP_UVLO_R} and EN/FLT is pulled high, the soft-start sequence starts with a primary duty cycle open loop control. The power stage operates with a fixed burst frequency with an incremental increasing duty cycle starting at 6.5% . The rate of change of the duty cycle is pre-programmed in the part to reduce the input inrush current while building the output voltage VCC. The primary side limits the maximum duty cycle during this phase till the secondary side VCC voltage passes a certain threshold before releasing this duty cycle limit. This limit will ensure minimum input current in case the device starts on a short circuit and the VCC is not building up. Once the VCC reaches the regulation range, the duty cycle is no longer determined from the primary side controller but instead VCC hysteritic control is active to tightly regulate the output voltage within the defined hysterisis bands to reduce the output voltage ripple.

The soft-start time will vary depending on the output capacitors and loading conditions. During VCC regulation state, the burst frequency will change according to the output capacitors and loading conditions. The burst frequency will be highest at higher loading conditions and lowest at light loading conditions by which light load efficiency improvments can be achieved.

Figure 6-1 Output Voltage Soft-Start Diagram