DLPU094 July   2020 DLP5530S-Q1

 

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7.3.2.2.4 Watchdogs and Clock Monitors

The following watchdogs are used to monitor that the various blocks of the DLPC230S-Q1 are properly operating. This is critical to ensuring that the LED brightness levels and timings are being properly controlled.

  • [SM_29] TPS99000S-Q1 Clock Ratio Monitor: The TPS99000S-Q1 calculates a ratio between its internal clock and the external DLPC230S-Q1 clock input in order to validate proper frequency operation of the main DLPC230S-Q1 clock source. The DLPC230S-Q1 main application periodically reads this ratio. If the ratio is outside of the expected range, the test fails. Upon failure an error is logged
  • [SM_30] DLPC230S-Q1 Processor Watchdog (WD1): The TPS99000S-Q1 monitors the DLPC230S-Q1 processor to make sure that it is continuously operating. The main application software periodically resets the watchdog timer within an allocated time window. If the watchdog signal is not received by the TPS99000S-Q1 during the time window, the test fails. Upon failure, the TPS99000S-Q1 will signal a park of the DMD and reset the chipset. The main application will read the reset cause from the TPS99000S-Q1 and assert HOST_IRQ during reset initialization.
  • [SM_31] DLPC230S-Q1 Sequencer Watchdog (WD2): The TPS99000S-Q1 monitors the SEQ_START signal that is generated by the sequencer at the beginning of each frame. If the signal is not received within approximately 7 frames, the TPS99000S-Q1 determines that the sequencer is not functioning properly. The TPS99000S-Q1 alerts the DLPC230S-Q1. The DLPC230S-Q1 will attempt to disable and re-enable the sequencer 3 times. If it is unsuccessful after 3 tries, and emergency shutdown will be executed and an error will be logged.
  • [SM_32] Sequencer Instruction Read Watchdog: During proper operation, the sequencer block constantly reads and executes instructions from the sequencer memory. The main application software sets a timer within which an instruction must be read from memory. The timer is reset every time an instruction is read. If an instruction is not read within the allocated time, the test fails. Upon failure, emergency shutdown will be executed and an error will be logged. This test is always active when an image is being displayed.
  • [SM_12] DMD Reset Instruction Watchdog: Checks that the DMD has accepted command to update mirror positions. A reset command from the DLPC230S-Q1 tells the DMD to update mirror positions. If this command is not executed, mirrors will remain in their current position. Upon successfully receiving a reset command the DMD returns an acknowledge message. If this is not received by the DLPC230S-Q1 within an acceptable time, this test fails. Upon failure, emergency shutdown will be executed and an error will be logged. This test is always active when an image is being displayed.