JAJSBR4E May   2012  – September 2021 TPS55340

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operation
      2. 7.3.2 Switching Frequency
      3. 7.3.3 Overcurrent Protection and Frequency Foldback
        1. 7.3.3.1 Minimum On-Time and Pulse Skipping
      4. 7.3.4 Voltage Reference and Setting Output Voltage
      5. 7.3.5 Soft-Start
      6. 7.3.6 Slope Compensation
      7. 7.3.7 Enable and Thermal Shutdown
      8. 7.3.8 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN < 2.9 V (Minimum VIN)
      2. 7.4.2 Operation With EN Control
      3. 7.4.3 Operation at Light Loads
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Boost Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design with WEBENCH Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency (R4)
          3. 8.2.1.2.3  Determining the Duty Cycle
          4. 8.2.1.2.4  Selecting the Inductor (L1)
          5. 8.2.1.2.5  Computing the Maximum Output Current
          6. 8.2.1.2.6  Selecting the Output Capacitors (C8, C9, C10)
          7. 8.2.1.2.7  Selecting the Input Capacitors (C2, C7)
          8. 8.2.1.2.8  Setting Output Voltage (R1, R2)
          9. 8.2.1.2.9  Setting the Soft-start Time (C7)
          10. 8.2.1.2.10 Selecting the Schottky Diode (D1)
          11. 8.2.1.2.11 Compensating the Control Loop (R3, C4, C5)
        3. 8.2.1.3 Application Curves
      2. 8.2.2 SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Selecting the Switching Frequency (R4)
          2. 8.2.2.2.2  Duty Cycle
          3. 8.2.2.2.3  Selecting the Inductor (L1)
          4. 8.2.2.2.4  Calculating the Maximum Output Current
          5. 8.2.2.2.5  Selecting the Output Capacitors (C8, C9, C10)
          6. 8.2.2.2.6  Selecting the Series Capacitor (C6)
          7. 8.2.2.2.7  Selecting the Input Capacitor (C2, C7)
          8. 8.2.2.2.8  Selecting the Schottky Diode (D1)
          9. 8.2.2.2.9  Setting the Output Voltage (R1, R2)
          10. 8.2.2.2.10 Setting the Soft-start Time (C3)
          11. 8.2.2.2.11 MOSFET Rating Considerations
          12. 8.2.2.2.12 Compensating the Control Loop (R3, C4)
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design with WEBENCH Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  12. 12Mechanical, Packaging, and Orderable Information

Electrical Characteristics

VIN = 5 V, TJ = –40°C to 150°C, unless otherwise noted. Typical values are at TA = 25°C.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY CURRENT
VINInput voltage range2.932V
IQOperating quiescent current into VINDevice nonswitching, VFB = 2 V0.5mA
ISDShutdown currentEN = GND2.710µA
VUVLOUndervoltage lockout thresholdVIN falling2.52.7V
VhysUndervoltage lockout hysteresis120140160mV
ENABLE AND REFERENCE CONTROL
VENEN threshold voltageEN rising input0.91.081.30V
VENEN threshold voltageEN falling input0.740.921.125V
VENhEN threshold hysteresis0.16V
RENEN pulldown resistor4009501600kΩ
ToffShutdown delay, SS dischargeEN high to low1.0ms
VSYNhSYN logic high voltage1.2V
VSYNlSYN logic low voltage0.4V
VOLTAGE AND CURRENT CONTROL
VREFVoltage feedback regulation voltage1.2041.2291.254V
TA = 25°C1.2201.2291.238
IFBVoltage feedback input bias currentTA = 25°C1.620nA
IsinkCOMP pin sink currentVFB = VREF + 200 mV, VCOMP = 1 V42µA
IsourceCOMP pin source currentVFB = VREF – 200 mV, VCOMP = 1 V42µA
VCCLPCOMP pin clamp voltageHigh Clamp, VFB = 1 V3.1V
Low Clamp, VFB = 1.5 V0.75
VCTHCOMP pin thresholdDuty cycle = 0%1.04V
GeaError amplifier transconductance240360440µS
ReaError amplifier output resistance10
feaError amplifier crossover frequency500kHz
FREQUENCY
fSWFrequencyRFREQ = 480 kΩ7594130kHz
RFREQ = 80 kΩ460577740
RFREQ = 40 kΩ92011401480
DmaxMaximum duty cycleVFB = 1.0 V, RFREQ = 80 kΩ89%96%
VFREQFREQ pin voltage1.25V
Tmin_onMinimum on pulse widthRFREQ = 80 kΩ77ns
POWER SWITCH
RDS(ON)N-channel MOSFET on-resistanceVIN = 5 V60110
VIN = 3 V70120
ILN_NFETN-channel leakage currentVDS = 25 V, TA = 25°C2.1µA
OCP and SS
ILIMN-channel MOSFET current limitD = Dmax5.256.67.75A
ISSSoft-start bias currentVSS = 0 V6µA
THERMAL SHUTDOWN
TshutdownThermal shutdown threshold165°C
ThysteresisThermal shutdown threshold hysteresis15°C